| // SPDX-License-Identifier: GPL-2.0-only |
| /* |
| * GS101 SoC |
| * |
| * Copyright 2019-2023 Google LLC |
| * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org> |
| */ |
| |
| #include <dt-bindings/clock/google,gs101.h> |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/soc/samsung,exynos-usi.h> |
| |
| / { |
| compatible = "google,gs101"; |
| #address-cells = <2>; |
| #size-cells = <1>; |
| |
| interrupt-parent = <&gic>; |
| |
| aliases { |
| pinctrl0 = &pinctrl_gpio_alive; |
| pinctrl1 = &pinctrl_far_alive; |
| pinctrl2 = &pinctrl_gsacore; |
| pinctrl3 = &pinctrl_gsactrl; |
| pinctrl4 = &pinctrl_peric0; |
| pinctrl5 = &pinctrl_peric1; |
| pinctrl6 = &pinctrl_hsi1; |
| pinctrl7 = &pinctrl_hsi2; |
| }; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu-map { |
| cluster0 { |
| core0 { |
| cpu = <&cpu0>; |
| }; |
| core1 { |
| cpu = <&cpu1>; |
| }; |
| core2 { |
| cpu = <&cpu2>; |
| }; |
| core3 { |
| cpu = <&cpu3>; |
| }; |
| }; |
| |
| cluster1 { |
| core0 { |
| cpu = <&cpu4>; |
| }; |
| core1 { |
| cpu = <&cpu5>; |
| }; |
| }; |
| |
| cluster2 { |
| core0 { |
| cpu = <&cpu6>; |
| }; |
| core1 { |
| cpu = <&cpu7>; |
| }; |
| }; |
| }; |
| |
| cpu0: cpu@0 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a55"; |
| reg = <0x0000>; |
| enable-method = "psci"; |
| cpu-idle-states = <&ANANKE_CPU_SLEEP>; |
| capacity-dmips-mhz = <250>; |
| dynamic-power-coefficient = <70>; |
| }; |
| |
| cpu1: cpu@100 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a55"; |
| reg = <0x0100>; |
| enable-method = "psci"; |
| cpu-idle-states = <&ANANKE_CPU_SLEEP>; |
| capacity-dmips-mhz = <250>; |
| dynamic-power-coefficient = <70>; |
| }; |
| |
| cpu2: cpu@200 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a55"; |
| reg = <0x0200>; |
| enable-method = "psci"; |
| cpu-idle-states = <&ANANKE_CPU_SLEEP>; |
| capacity-dmips-mhz = <250>; |
| dynamic-power-coefficient = <70>; |
| }; |
| |
| cpu3: cpu@300 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a55"; |
| reg = <0x0300>; |
| enable-method = "psci"; |
| cpu-idle-states = <&ANANKE_CPU_SLEEP>; |
| capacity-dmips-mhz = <250>; |
| dynamic-power-coefficient = <70>; |
| }; |
| |
| cpu4: cpu@400 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a76"; |
| reg = <0x0400>; |
| enable-method = "psci"; |
| cpu-idle-states = <&ENYO_CPU_SLEEP>; |
| capacity-dmips-mhz = <620>; |
| dynamic-power-coefficient = <284>; |
| }; |
| |
| cpu5: cpu@500 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a76"; |
| reg = <0x0500>; |
| enable-method = "psci"; |
| cpu-idle-states = <&ENYO_CPU_SLEEP>; |
| capacity-dmips-mhz = <620>; |
| dynamic-power-coefficient = <284>; |
| }; |
| |
| cpu6: cpu@600 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-x1"; |
| reg = <0x0600>; |
| enable-method = "psci"; |
| cpu-idle-states = <&HERA_CPU_SLEEP>; |
| capacity-dmips-mhz = <1024>; |
| dynamic-power-coefficient = <650>; |
| }; |
| |
| cpu7: cpu@700 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-x1"; |
| reg = <0x0700>; |
| enable-method = "psci"; |
| cpu-idle-states = <&HERA_CPU_SLEEP>; |
| capacity-dmips-mhz = <1024>; |
| dynamic-power-coefficient = <650>; |
| }; |
| |
| idle-states { |
| entry-method = "psci"; |
| |
| ANANKE_CPU_SLEEP: cpu-ananke-sleep { |
| idle-state-name = "c2"; |
| compatible = "arm,idle-state"; |
| arm,psci-suspend-param = <0x0010000>; |
| entry-latency-us = <70>; |
| exit-latency-us = <160>; |
| min-residency-us = <2000>; |
| }; |
| |
| ENYO_CPU_SLEEP: cpu-enyo-sleep { |
| idle-state-name = "c2"; |
| compatible = "arm,idle-state"; |
| arm,psci-suspend-param = <0x0010000>; |
| entry-latency-us = <150>; |
| exit-latency-us = <190>; |
| min-residency-us = <2500>; |
| }; |
| |
| HERA_CPU_SLEEP: cpu-hera-sleep { |
| idle-state-name = "c2"; |
| compatible = "arm,idle-state"; |
| arm,psci-suspend-param = <0x0010000>; |
| entry-latency-us = <235>; |
| exit-latency-us = <220>; |
| min-residency-us = <3500>; |
| }; |
| }; |
| }; |
| |
| /* ect node is required to be present by bootloader */ |
| ect { |
| }; |
| |
| ext_24_5m: clock-1 { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-output-names = "oscclk"; |
| }; |
| |
| ext_200m: clock-2 { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-output-names = "ext-200m"; |
| }; |
| |
| pmu-0 { |
| compatible = "arm,cortex-a55-pmu"; |
| interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster0>; |
| }; |
| |
| pmu-1 { |
| compatible = "arm,cortex-a76-pmu"; |
| interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster1>; |
| }; |
| |
| pmu-2 { |
| compatible = "arm,cortex-x1-pmu"; |
| interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster2>; |
| }; |
| |
| pmu-3 { |
| compatible = "arm,dsu-pmu"; |
| interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH 0>; |
| cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>, |
| <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; |
| }; |
| |
| psci { |
| compatible = "arm,psci-1.0"; |
| method = "smc"; |
| }; |
| |
| reserved_memory: reserved-memory { |
| #address-cells = <2>; |
| #size-cells = <1>; |
| ranges; |
| |
| gsa_reserved_protected: gsa@90200000 { |
| reg = <0x0 0x90200000 0x400000>; |
| no-map; |
| }; |
| |
| tpu_fw_reserved: tpu-fw@93000000 { |
| reg = <0x0 0x93000000 0x1000000>; |
| no-map; |
| }; |
| |
| aoc_reserve: aoc@94000000 { |
| reg = <0x0 0x94000000 0x03000000>; |
| no-map; |
| }; |
| |
| abl_reserved: abl@f8800000 { |
| reg = <0x0 0xf8800000 0x02000000>; |
| no-map; |
| }; |
| |
| dss_log_reserved: dss-log-reserved@fd3f0000 { |
| reg = <0x0 0xfd3f0000 0x0000e000>; |
| no-map; |
| }; |
| |
| debug_kinfo_reserved: debug-kinfo-reserved@fd3fe000 { |
| reg = <0x0 0xfd3fe000 0x00001000>; |
| no-map; |
| }; |
| |
| bldr_log_reserved: bldr-log-reserved@fd800000 { |
| reg = <0x0 0xfd800000 0x00100000>; |
| no-map; |
| }; |
| |
| bldr_log_hist_reserved: bldr-log-hist-reserved@fd900000 { |
| reg = <0x0 0xfd900000 0x00002000>; |
| no-map; |
| }; |
| }; |
| |
| soc: soc@0 { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0x0 0x0 0x0 0x40000000>; |
| |
| cmu_misc: clock-controller@10010000 { |
| compatible = "google,gs101-cmu-misc"; |
| reg = <0x10010000 0x8000>; |
| #clock-cells = <1>; |
| clocks = <&cmu_top CLK_DOUT_CMU_MISC_BUS>, |
| <&cmu_top CLK_DOUT_CMU_MISC_SSS>; |
| clock-names = "bus", "sss"; |
| }; |
| |
| timer@10050000 { |
| compatible = "google,gs101-mct", |
| "samsung,exynos4210-mct"; |
| reg = <0x10050000 0x800>; |
| interrupts = <GIC_SPI 753 IRQ_TYPE_LEVEL_HIGH 0>, |
| <GIC_SPI 754 IRQ_TYPE_LEVEL_HIGH 0>, |
| <GIC_SPI 755 IRQ_TYPE_LEVEL_HIGH 0>, |
| <GIC_SPI 756 IRQ_TYPE_LEVEL_HIGH 0>, |
| <GIC_SPI 757 IRQ_TYPE_LEVEL_HIGH 0>, |
| <GIC_SPI 758 IRQ_TYPE_LEVEL_HIGH 0>, |
| <GIC_SPI 759 IRQ_TYPE_LEVEL_HIGH 0>, |
| <GIC_SPI 760 IRQ_TYPE_LEVEL_HIGH 0>, |
| <GIC_SPI 761 IRQ_TYPE_LEVEL_HIGH 0>, |
| <GIC_SPI 762 IRQ_TYPE_LEVEL_HIGH 0>, |
| <GIC_SPI 763 IRQ_TYPE_LEVEL_HIGH 0>, |
| <GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH 0>; |
| clocks = <&ext_24_5m>, <&cmu_misc CLK_GOUT_MISC_MCT_PCLK>; |
| clock-names = "fin_pll", "mct"; |
| }; |
| |
| watchdog_cl0: watchdog@10060000 { |
| compatible = "google,gs101-wdt"; |
| reg = <0x10060000 0x100>; |
| interrupts = <GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH 0>; |
| clocks = <&cmu_misc CLK_GOUT_MISC_WDT_CLUSTER0_PCLK>, |
| <&ext_24_5m>; |
| clock-names = "watchdog", "watchdog_src"; |
| samsung,syscon-phandle = <&pmu_system_controller>; |
| samsung,cluster-index = <0>; |
| status = "disabled"; |
| }; |
| |
| watchdog_cl1: watchdog@10070000 { |
| compatible = "google,gs101-wdt"; |
| reg = <0x10070000 0x100>; |
| interrupts = <GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH 0>; |
| clocks = <&cmu_misc CLK_GOUT_MISC_WDT_CLUSTER1_PCLK>, |
| <&ext_24_5m>; |
| clock-names = "watchdog", "watchdog_src"; |
| samsung,syscon-phandle = <&pmu_system_controller>; |
| samsung,cluster-index = <1>; |
| status = "disabled"; |
| }; |
| |
| gic: interrupt-controller@10400000 { |
| compatible = "arm,gic-v3"; |
| #interrupt-cells = <4>; |
| interrupt-controller; |
| reg = <0x10400000 0x10000>, /* GICD */ |
| <0x10440000 0x100000>;/* GICR * 8 */ |
| interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>; |
| |
| ppi-partitions { |
| ppi_cluster0: interrupt-partition-0 { |
| affinity = <&cpu0 &cpu1 &cpu2 &cpu3>; |
| }; |
| |
| ppi_cluster1: interrupt-partition-1 { |
| affinity = <&cpu4 &cpu5>; |
| }; |
| |
| ppi_cluster2: interrupt-partition-2 { |
| affinity = <&cpu6 &cpu7>; |
| }; |
| }; |
| }; |
| |
| cmu_peric0: clock-controller@10800000 { |
| compatible = "google,gs101-cmu-peric0"; |
| reg = <0x10800000 0x4000>; |
| #clock-cells = <1>; |
| clocks = <&ext_24_5m>, |
| <&cmu_top CLK_DOUT_CMU_PERIC0_BUS>, |
| <&cmu_top CLK_DOUT_CMU_PERIC0_IP>; |
| clock-names = "oscclk", "bus", "ip"; |
| }; |
| |
| sysreg_peric0: syscon@10820000 { |
| compatible = "google,gs101-peric0-sysreg", "syscon"; |
| reg = <0x10820000 0x10000>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_SYSREG_PERIC0_PCLK>; |
| }; |
| |
| pinctrl_peric0: pinctrl@10840000 { |
| compatible = "google,gs101-pinctrl"; |
| reg = <0x10840000 0x00001000>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_GPIO_PERIC0_PCLK>; |
| clock-names = "pclk"; |
| interrupts = <GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH 0>; |
| }; |
| |
| usi1: usi@109000c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x109000c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric0 0x1000>; |
| status = "disabled"; |
| |
| hsi2c_1: i2c@10900000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10900000 0xc0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&hsi2c1_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_1: serial@10900000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10900000 0xc0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart1_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_1: spi@10900000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10900000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_0>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi1_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| usi2: usi@109100c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x109100c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric0 0x1004>; |
| status = "disabled"; |
| |
| hsi2c_2: i2c@10910000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10910000 0xc0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&hsi2c2_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_2: serial@10910000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10910000 0xc0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart2_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_2: spi@10910000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10910000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_1>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 636 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi2_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| usi3: usi@109200c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x109200c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric0 0x1008>; |
| status = "disabled"; |
| |
| hsi2c_3: i2c@10920000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10920000 0xc0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&hsi2c3_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_3: serial@10920000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10920000 0xc0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart3_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_3: spi@10920000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10920000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_2>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 637 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi3_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| usi4: usi@109300c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x109300c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric0 0x100c>; |
| status = "disabled"; |
| |
| hsi2c_4: i2c@10930000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10930000 0xc0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&hsi2c4_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_4: serial@10930000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10930000 0xc0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart4_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_4: spi@10930000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10930000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_3>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 638 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi4_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| usi5: usi@109400c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x109400c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric0 0x1010>; |
| status = "disabled"; |
| |
| hsi2c_5: i2c@10940000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10940000 0xc0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&hsi2c5_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_5: serial@10940000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10940000 0xc0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart5_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_5: spi@10940000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10940000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_4>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi5_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| usi6: usi@109500c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x109500c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric0 0x1014>; |
| status = "disabled"; |
| |
| hsi2c_6: i2c@10950000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10950000 0xc0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&hsi2c6_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_6: serial@10950000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10950000 0xc0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart6_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_6: spi@10950000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10950000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_5>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 640 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi6_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| usi7: usi@109600c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x109600c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric0 0x1018>; |
| status = "disabled"; |
| |
| hsi2c_7: i2c@10960000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10960000 0xc0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&hsi2c7_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_7: serial@10960000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10960000 0xc0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart7_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_7: spi@10960000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10960000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_6>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi7_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| usi8: usi@109700c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x109700c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric0 0x101c>; |
| status = "disabled"; |
| |
| hsi2c_8: i2c@10970000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10970000 0xc0>; |
| interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| pinctrl-0 = <&hsi2c8_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_8: serial@10970000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10970000 0xc0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart8_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_8: spi@10970000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10970000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi8_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| usi_uart: usi@10a000c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x10a000c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric0 0x1020>; |
| samsung,mode = <USI_V2_UART>; |
| status = "disabled"; |
| |
| serial_0: serial@10a00000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10a00000 0xc0>; |
| interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>; |
| clock-names = "uart", "clk_uart_baud0"; |
| pinctrl-0 = <&uart0_bus>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <256>; |
| status = "disabled"; |
| }; |
| }; |
| |
| usi14: usi@10a200c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x10a200c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric0 0x1028>; |
| status = "disabled"; |
| |
| hsi2c_14: i2c@10a20000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10a20000 0xc0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&hsi2c14_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_14: serial@10a20000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10a20000 0xc0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart14_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_14: spi@10a20000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10a20000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_2>, |
| <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi14_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| cmu_peric1: clock-controller@10c00000 { |
| compatible = "google,gs101-cmu-peric1"; |
| reg = <0x10c00000 0x4000>; |
| #clock-cells = <1>; |
| clocks = <&ext_24_5m>, |
| <&cmu_top CLK_DOUT_CMU_PERIC1_BUS>, |
| <&cmu_top CLK_DOUT_CMU_PERIC1_IP>; |
| clock-names = "oscclk", "bus", "ip"; |
| }; |
| |
| sysreg_peric1: syscon@10c20000 { |
| compatible = "google,gs101-peric1-sysreg", "syscon"; |
| reg = <0x10c20000 0x10000>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK>; |
| }; |
| |
| pinctrl_peric1: pinctrl@10c40000 { |
| compatible = "google,gs101-pinctrl"; |
| reg = <0x10c40000 0x00001000>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_GPIO_PERIC1_PCLK>; |
| clock-names = "pclk"; |
| interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>; |
| }; |
| |
| usi0: usi@10d100c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x10d100c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric1 0x1000>; |
| status = "disabled"; |
| |
| hsi2c_0: i2c@10d10000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10d10000 0xc0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&hsi2c0_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_usi0: serial@10d10000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10d10000 0xc0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart0_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_0: spi@10d10000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10d10000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_1>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi0_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| usi9: usi@10d200c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x10d200c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric1 0x1004>; |
| status = "disabled"; |
| |
| hsi2c_9: i2c@10d20000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10d20000 0xc0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&hsi2c9_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_9: serial@10d20000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10d20000 0xc0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart9_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_9: spi@10d20000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10d20000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_2>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi9_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| usi10: usi@10d300c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x10d300c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric1 0x1008>; |
| status = "disabled"; |
| |
| hsi2c_10: i2c@10d30000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10d30000 0xc0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&hsi2c10_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_10: serial@10d30000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10d30000 0xc0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart10_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_10: spi@10d30000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10d30000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_3>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 653 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi10_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| usi11: usi@10d400c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x10d400c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric1 0x100c>; |
| status = "disabled"; |
| |
| hsi2c_11: i2c@10d40000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10d40000 0xc0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&hsi2c11_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_11: serial@10d40000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10d40000 0xc0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart11_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_11: spi@10d40000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10d40000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_4>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi11_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| usi12: usi@10d500c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x10d500c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric1 0x1010>; |
| status = "disabled"; |
| |
| hsi2c_12: i2c@10d50000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10d50000 0xc0>; |
| interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| pinctrl-0 = <&hsi2c12_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_12: serial@10d50000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10d50000 0xc0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart12_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_12: spi@10d50000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10d50000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi12_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| usi13: usi@10d600c0 { |
| compatible = "google,gs101-usi", "samsung,exynos850-usi"; |
| reg = <0x10d600c0 0x20>; |
| ranges; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>; |
| clock-names = "pclk", "ipclk"; |
| samsung,sysreg = <&sysreg_peric1 0x1014>; |
| status = "disabled"; |
| |
| hsi2c_13: i2c@10d60000 { |
| compatible = "google,gs101-hsi2c", |
| "samsung,exynosautov9-hsi2c"; |
| reg = <0x10d60000 0xc0>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>; |
| clock-names = "hsi2c", "hsi2c_pclk"; |
| interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&hsi2c13_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| |
| serial_13: serial@10d60000 { |
| compatible = "google,gs101-uart"; |
| reg = <0x10d60000 0xc0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>; |
| clock-names = "uart", "clk_uart_baud0"; |
| interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&uart13_bus_single>; |
| pinctrl-names = "default"; |
| samsung,uart-fifosize = <64>; |
| status = "disabled"; |
| }; |
| |
| spi_13: spi@10d60000 { |
| compatible = "google,gs101-spi"; |
| reg = <0x10d60000 0x30>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_6>, |
| <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>; |
| clock-names = "spi", "spi_busclk0"; |
| interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>; |
| pinctrl-0 = <&spi13_bus>; |
| pinctrl-names = "default"; |
| status = "disabled"; |
| }; |
| }; |
| |
| cmu_hsi0: clock-controller@11000000 { |
| compatible = "google,gs101-cmu-hsi0"; |
| reg = <0x11000000 0x4000>; |
| #clock-cells = <1>; |
| |
| clocks = <&ext_24_5m>, |
| <&cmu_top CLK_DOUT_CMU_HSI0_BUS>, |
| <&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>, |
| <&cmu_top CLK_DOUT_CMU_HSI0_USB31DRD>, |
| <&cmu_top CLK_DOUT_CMU_HSI0_USBDPDBG>; |
| clock-names = "oscclk", "bus", "dpgtc", "usb31drd", |
| "usbdpdbg"; |
| }; |
| |
| usbdrd31_phy: phy@11100000 { |
| compatible = "google,gs101-usb31drd-phy"; |
| reg = <0x11100000 0x0100>, |
| <0x110f0000 0x0800>, |
| <0x110e0000 0x2800>; |
| reg-names = "phy", "pcs", "pma"; |
| clocks = <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_ACLK_PHYCTRL>, |
| <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB20_PHY_REFCLK_26>, |
| <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_CTRL_ACLK>, |
| <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_CTRL_PCLK>, |
| <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USBDPPHY_SCL_APB_PCLK>; |
| clock-names = "phy", "ref", "ctrl_aclk", "ctrl_pclk", "scl_pclk"; |
| samsung,pmu-syscon = <&pmu_system_controller>; |
| #phy-cells = <1>; |
| status = "disabled"; |
| }; |
| |
| usbdrd31: usb@11110000 { |
| compatible = "google,gs101-dwusb3"; |
| clocks = <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_BUS_CLK_EARLY>, |
| <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB31DRD_SUSPEND_CLK_26>, |
| <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_LINK_ACLK>, |
| <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_LINK_PCLK>; |
| clock-names = "bus_early", "susp_clk", "link_aclk", "link_pclk"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0x0 0x11110000 0x10000>; |
| status = "disabled"; |
| |
| usbdrd31_dwc3: usb@0 { |
| compatible = "snps,dwc3"; |
| clocks = <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB31DRD_REF_CLK_40>; |
| clock-names = "ref"; |
| reg = <0x0 0x10000>; |
| interrupts = <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH 0>; |
| phys = <&usbdrd31_phy 0>, <&usbdrd31_phy 1>; |
| phy-names = "usb2-phy", "usb3-phy"; |
| status = "disabled"; |
| }; |
| }; |
| |
| pinctrl_hsi1: pinctrl@11840000 { |
| compatible = "google,gs101-pinctrl"; |
| reg = <0x11840000 0x00001000>; |
| /* TODO: update once support for this CMU exists */ |
| clocks = <0>; |
| clock-names = "pclk"; |
| interrupts = <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH 0>; |
| }; |
| |
| cmu_hsi2: clock-controller@14400000 { |
| compatible = "google,gs101-cmu-hsi2"; |
| reg = <0x14400000 0x4000>; |
| #clock-cells = <1>; |
| clocks = <&ext_24_5m>, |
| <&cmu_top CLK_DOUT_CMU_HSI2_BUS>, |
| <&cmu_top CLK_DOUT_CMU_HSI2_PCIE>, |
| <&cmu_top CLK_DOUT_CMU_HSI2_UFS_EMBD>, |
| <&cmu_top CLK_DOUT_CMU_HSI2_MMC_CARD>; |
| clock-names = "oscclk", "bus", "pcie", "ufs", "mmc"; |
| }; |
| |
| sysreg_hsi2: syscon@14420000 { |
| compatible = "google,gs101-hsi2-sysreg", "syscon"; |
| reg = <0x14420000 0x10000>; |
| clocks = <&cmu_hsi2 CLK_GOUT_HSI2_SYSREG_HSI2_PCLK>; |
| }; |
| |
| pinctrl_hsi2: pinctrl@14440000 { |
| compatible = "google,gs101-pinctrl"; |
| reg = <0x14440000 0x00001000>; |
| clocks = <&cmu_hsi2 CLK_GOUT_HSI2_GPIO_HSI2_PCLK>; |
| clock-names = "pclk"; |
| interrupts = <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH 0>; |
| }; |
| |
| ufs_0: ufs@14700000 { |
| compatible = "google,gs101-ufs"; |
| reg = <0x14700000 0x200>, |
| <0x14701100 0x200>, |
| <0x14780000 0xa000>, |
| <0x14600000 0x100>; |
| reg-names = "hci", "vs_hci", "unipro", "ufsp"; |
| interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH 0>; |
| clocks = <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_ACLK>, |
| <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_CLK_UNIPRO>, |
| <&cmu_hsi2 CLK_GOUT_HSI2_UFS_EMBD_I_FMP_CLK>, |
| <&cmu_hsi2 CLK_GOUT_HSI2_QE_UFS_EMBD_HSI2_ACLK>, |
| <&cmu_hsi2 CLK_GOUT_HSI2_QE_UFS_EMBD_HSI2_PCLK>, |
| <&cmu_hsi2 CLK_GOUT_HSI2_SYSREG_HSI2_PCLK>; |
| clock-names = "core_clk", "sclk_unipro_main", "fmp", |
| "aclk", "pclk", "sysreg"; |
| freq-table-hz = <0 0>, <0 0>, <0 0>, <0 0>, <0 0>, <0 0>; |
| pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; |
| pinctrl-names = "default"; |
| phys = <&ufs_0_phy>; |
| phy-names = "ufs-phy"; |
| samsung,sysreg = <&sysreg_hsi2 0x710>; |
| status = "disabled"; |
| }; |
| |
| ufs_0_phy: phy@14704000 { |
| compatible = "google,gs101-ufs-phy"; |
| reg = <0x14704000 0x3000>; |
| reg-names = "phy-pma"; |
| samsung,pmu-syscon = <&pmu_system_controller>; |
| #phy-cells = <0>; |
| clocks = <&ext_24_5m>; |
| clock-names = "ref_clk"; |
| status = "disabled"; |
| }; |
| |
| cmu_apm: clock-controller@17400000 { |
| compatible = "google,gs101-cmu-apm"; |
| reg = <0x17400000 0x8000>; |
| #clock-cells = <1>; |
| |
| clocks = <&ext_24_5m>; |
| clock-names = "oscclk"; |
| }; |
| |
| sysreg_apm: syscon@174204e0 { |
| compatible = "google,gs101-apm-sysreg", "syscon"; |
| reg = <0x174204e0 0x1000>; |
| }; |
| |
| pmu_system_controller: system-controller@17460000 { |
| compatible = "google,gs101-pmu", "syscon"; |
| reg = <0x17460000 0x10000>; |
| }; |
| |
| pinctrl_gpio_alive: pinctrl@174d0000 { |
| compatible = "google,gs101-pinctrl"; |
| reg = <0x174d0000 0x00001000>; |
| clocks = <&cmu_apm CLK_GOUT_APM_APBIF_GPIO_ALIVE_PCLK>; |
| clock-names = "pclk"; |
| |
| wakeup-interrupt-controller { |
| compatible = "google,gs101-wakeup-eint", |
| "samsung,exynos850-wakeup-eint", |
| "samsung,exynos7-wakeup-eint"; |
| }; |
| }; |
| |
| pinctrl_far_alive: pinctrl@174e0000 { |
| compatible = "google,gs101-pinctrl"; |
| reg = <0x174e0000 0x00001000>; |
| clocks = <&cmu_apm CLK_GOUT_APM_APBIF_GPIO_FAR_ALIVE_PCLK>; |
| clock-names = "pclk"; |
| |
| wakeup-interrupt-controller { |
| compatible = "google,gs101-wakeup-eint", |
| "samsung,exynos850-wakeup-eint", |
| "samsung,exynos7-wakeup-eint"; |
| }; |
| }; |
| |
| pinctrl_gsactrl: pinctrl@17940000 { |
| compatible = "google,gs101-pinctrl"; |
| reg = <0x17940000 0x00001000>; |
| /* TODO: update once support for this CMU exists */ |
| clocks = <0>; |
| clock-names = "pclk"; |
| }; |
| |
| pinctrl_gsacore: pinctrl@17a80000 { |
| compatible = "google,gs101-pinctrl"; |
| reg = <0x17a80000 0x00001000>; |
| /* TODO: update once support for this CMU exists */ |
| clocks = <0>; |
| clock-names = "pclk"; |
| }; |
| |
| cmu_top: clock-controller@1e080000 { |
| compatible = "google,gs101-cmu-top"; |
| reg = <0x1e080000 0x8000>; |
| #clock-cells = <1>; |
| |
| clocks = <&ext_24_5m>; |
| clock-names = "oscclk"; |
| }; |
| }; |
| |
| timer { |
| compatible = "arm,armv8-timer"; |
| interrupts = |
| <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>, |
| <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>, |
| <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>, |
| <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW) 0>; |
| }; |
| }; |
| |
| #include "gs101-pinctrl.dtsi" |