# | |
# Copyright 2013 Freescale Semiconductor, Inc. | |
# | |
# SPDX-License-Identifier: GPL-2.0+ | |
# | |
# Refer doc/README.pblimage for more details about how-to configure | |
# and create PBL boot image | |
# | |
#PBI commands | |
#Initialize CPC1 | |
09010000 00200400 | |
09138000 00000000 | |
091380c0 00000100 | |
#512KB SRAM | |
09010100 00000000 | |
09010104 fff80009 | |
09010f00 08000000 | |
#enable CPC1 | |
09010000 80000000 | |
#Configure LAW for CPC1 | |
09000d00 00000000 | |
09000d04 fff80000 | |
09000d08 81000012 | |
#Initialize eSPI controller, default configuration is slow for eSPI to | |
#load data, this configuration comes from u-boot eSPI driver. | |
09110000 80000403 | |
09110020 2d170008 | |
09110024 00100008 | |
09110028 00100008 | |
0911002c 00100008 | |
#Errata for slowing down the MDC clock to make it <= 2.5 MHZ | |
094fc030 00008148 | |
094fd030 00008148 | |
#Configure alternate space | |
09000010 00000000 | |
09000014 ff000000 | |
09000018 81000000 | |
#Flush PBL data | |
091380c0 00100000 |