| * Copyright (C) 2012 Altera Corporation <www.altera.com> |
| * SPDX-License-Identifier: GPL-2.0+ |
| gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); |
| #if defined(CONFIG_DISPLAY_CPUINFO) |
| puts("CPU : Altera SOCFPGA Platform\n"); |
| #if defined(CONFIG_SYS_CONSOLE_IS_IN_ENV) && \ |
| defined(CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE) |
| int overwrite_console(void) |
| * DesignWare Ethernet initialization |
| int cpu_eth_init(bd_t *bis) |
| #if !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) && !defined(CONFIG_SPL_BUILD) |
| /* initialize and register the emac */ |
| return designware_initialize(CONFIG_EMAC_BASE, |
| CONFIG_PHY_INTERFACE_MODE); |