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git01.mediatek.com / filogic / uboot / c9c953999b6d4f728a1e9d5a9a3568925c78ef9b / . / arch / arm / mach-socfpga / include / mach
tree: 6f1fb580992c732aa1d41ed3a0491d45b694e065 [path history] [tgz]
  1. base_addr_a10.h
  2. base_addr_ac5.h
  3. base_addr_soc64.h
  4. boot0.h
  5. clock_manager.h
  6. clock_manager_agilex.h
  7. clock_manager_arria10.h
  8. clock_manager_gen5.h
  9. clock_manager_n5x.h
  10. clock_manager_s10.h
  11. clock_manager_soc64.h
  12. firewall.h
  13. fpga_manager.h
  14. fpga_manager_arria10.h
  15. fpga_manager_gen5.h
  16. freeze_controller.h
  17. gpio.h
  18. handoff_soc64.h
  19. mailbox_s10.h
  20. misc.h
  21. nic301.h
  22. pinmux.h
  23. reset_manager.h
  24. reset_manager_arria10.h
  25. reset_manager_gen5.h
  26. reset_manager_soc64.h
  27. scan_manager.h
  28. scu.h
  29. sdram.h
  30. sdram_arria10.h
  31. sdram_gen5.h
  32. secure_reg_helper.h
  33. secure_vab.h
  34. smc_api.h
  35. system_manager.h
  36. system_manager_arria10.h
  37. system_manager_gen5.h
  38. system_manager_soc64.h
  39. timer.h