ARM: uniphier: de-couple SC macros into base address and offset
The SC_* macros represent the address of SysCtrl registers.
For a planned new SoC, its base address will be changed.
Turn the SC_* macros into the offset from the base address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
diff --git a/arch/arm/mach-uniphier/clk/pll-base-ld20.c b/arch/arm/mach-uniphier/clk/pll-base-ld20.c
index 67b8ee7..ea96d73 100644
--- a/arch/arm/mach-uniphier/clk/pll-base-ld20.c
+++ b/arch/arm/mach-uniphier/clk/pll-base-ld20.c
@@ -12,6 +12,7 @@
#include <linux/io.h>
#include <linux/sizes.h>
+#include "../sc64-regs.h"
#include "pll.h"
/* PLL type: SSC */
@@ -31,13 +32,9 @@
int uniphier_ld20_sscpll_init(unsigned long reg_base, unsigned int freq,
unsigned int ssc_rate, unsigned int divn)
{
- void __iomem *base;
+ void __iomem *base = sc_base + reg_base;
u32 tmp;
- base = ioremap(reg_base, SZ_16);
- if (!base)
- return -ENOMEM;
-
if (freq != UNIPHIER_PLL_FREQ_DEFAULT) {
tmp = readl(base); /* SSCPLLCTRL */
tmp &= ~SC_PLLCTRL_SSC_DK_MASK;
@@ -60,57 +57,39 @@
tmp |= SC_PLLCTRL2_NRSTDS;
writel(tmp, base + 4);
- iounmap(base);
-
return 0;
}
int uniphier_ld20_sscpll_ssc_en(unsigned long reg_base)
{
- void __iomem *base;
+ void __iomem *base = sc_base + reg_base;
u32 tmp;
- base = ioremap(reg_base, SZ_16);
- if (!base)
- return -ENOMEM;
-
tmp = readl(base); /* SSCPLLCTRL */
tmp |= SC_PLLCTRL_SSC_EN;
writel(tmp, base);
- iounmap(base);
-
return 0;
}
int uniphier_ld20_sscpll_set_regi(unsigned long reg_base, unsigned regi)
{
- void __iomem *base;
+ void __iomem *base = sc_base + reg_base;
u32 tmp;
- base = ioremap(reg_base, SZ_16);
- if (!base)
- return -ENOMEM;
-
tmp = readl(base + 8); /* SSCPLLCTRL3 */
tmp &= ~SC_PLLCTRL3_REGI_MASK;
tmp |= FIELD_PREP(SC_PLLCTRL3_REGI_MASK, regi);
writel(tmp, base + 8);
- iounmap(base);
-
return 0;
}
int uniphier_ld20_vpll27_init(unsigned long reg_base)
{
- void __iomem *base;
+ void __iomem *base = sc_base + reg_base;
u32 tmp;
- base = ioremap(reg_base, SZ_16);
- if (!base)
- return -ENOMEM;
-
tmp = readl(base); /* VPLL27CTRL */
tmp |= SC_VPLL27CTRL_WP; /* write protect off */
writel(tmp, base);
@@ -123,25 +102,17 @@
tmp &= ~SC_VPLL27CTRL_WP; /* write protect on */
writel(tmp, base);
- iounmap(base);
-
return 0;
}
int uniphier_ld20_dspll_init(unsigned long reg_base)
{
- void __iomem *base;
+ void __iomem *base = sc_base + reg_base;
u32 tmp;
- base = ioremap(reg_base, SZ_16);
- if (!base)
- return -ENOMEM;
-
tmp = readl(base + 4); /* DSPLLCTRL2 */
tmp |= SC_DSPLLCTRL2_K_LD;
writel(tmp, base + 4);
- iounmap(base);
-
return 0;
}