ARM: uniphier: de-couple SC macros into base address and offset
The SC_* macros represent the address of SysCtrl registers.
For a planned new SoC, its base address will be changed.
Turn the SC_* macros into the offset from the base address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
diff --git a/arch/arm/mach-uniphier/clk/clk-pxs2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c
index afa12fa..8cb4f87 100644
--- a/arch/arm/mach-uniphier/clk/clk-pxs2.c
+++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c
@@ -14,29 +14,29 @@
u32 tmp;
/* deassert reset */
- tmp = readl(SC_RSTCTRL);
+ tmp = readl(sc_base + SC_RSTCTRL);
#ifdef CONFIG_USB_DWC3_UNIPHIER
tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO;
#endif
#ifdef CONFIG_NAND_DENALI
tmp |= SC_RSTCTRL_NRST_NAND;
#endif
- writel(tmp, SC_RSTCTRL);
- readl(SC_RSTCTRL); /* dummy read */
+ writel(tmp, sc_base + SC_RSTCTRL);
+ readl(sc_base + SC_RSTCTRL); /* dummy read */
#ifdef CONFIG_USB_DWC3_UNIPHIER
- tmp = readl(SC_RSTCTRL2);
+ tmp = readl(sc_base + SC_RSTCTRL2);
tmp |= SC_RSTCTRL2_NRST_USB3B1;
- writel(tmp, SC_RSTCTRL2);
- readl(SC_RSTCTRL2); /* dummy read */
+ writel(tmp, sc_base + SC_RSTCTRL2);
+ readl(sc_base + SC_RSTCTRL2); /* dummy read */
- tmp = readl(SC_RSTCTRL6);
+ tmp = readl(sc_base + SC_RSTCTRL6);
tmp |= 0x37;
- writel(tmp, SC_RSTCTRL6);
+ writel(tmp, sc_base + SC_RSTCTRL6);
#endif
/* provide clocks */
- tmp = readl(SC_CLKCTRL);
+ tmp = readl(sc_base + SC_CLKCTRL);
#ifdef CONFIG_USB_DWC3_UNIPHIER
tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
SC_CLKCTRL_CEN_GIO;
@@ -44,6 +44,6 @@
#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;
#endif
- writel(tmp, SC_CLKCTRL);
- readl(SC_CLKCTRL); /* dummy read */
+ writel(tmp, sc_base + SC_CLKCTRL);
+ readl(sc_base + SC_CLKCTRL); /* dummy read */
}