| commit | bd0c46f4a26794c91117eb6c16f716e32ce10d67 | [log] [tgz] |
|---|---|---|
| author | Peng Fan <peng.fan@nxp.com> | Wed Jan 06 11:06:31 2016 +0800 |
| committer | Stefano Babic <sbabic@denx.de> | Sun Jan 24 12:13:21 2016 +0100 |
| tree | e30126c87d2fff657f6cbcf14b37df543dde9194 | |
| parent | 0fe0ddc27fc0ab326e8c46a145a296dd10494e43 [diff] |
imx: mx6ul/sx: fix mmdc_ch0 clk calculation Check "Figure 19-5. BUS clock generation" of i.MX 6SoloX Applications Processor Reference Manual and "Figure 18-5. BUS clock generation" of i.MX 6UltraLite Applications Processor Reference Manual. If mmdc clk sources from pll4_main_clk(pll_audio), the calculation is wrong. Fix mmdc_ch0 clk calculation. Also add PLL_AUDIO/VIDEO support for decode_pll. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>