/* | |
* Samsung's Exynos5420 SoC pin-mux and pin-config device tree source | |
* | |
* Copyright (c) 2013 Samsung Electronics Co., Ltd. | |
* http://www.samsung.com | |
* | |
* Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device | |
* tree nodes are listed in this file. | |
* | |
* This program is free software; you can redistribute it and/or modify | |
* it under the terms of the GNU General Public License version 2 as | |
* published by the Free Software Foundation. | |
*/ | |
#include "exynos54xx-pinctrl-uboot.dtsi" | |
/ { | |
pinctrl@13400000 { | |
gpy7: gpy7 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpx0: gpx0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
interrupt-parent = <&combiner>; | |
#interrupt-cells = <2>; | |
interrupts = <23 0>, <24 0>, <25 0>, <25 1>, | |
<26 0>, <26 1>, <27 0>, <27 1>; | |
}; | |
gpx1: gpx1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
interrupt-parent = <&combiner>; | |
#interrupt-cells = <2>; | |
interrupts = <28 0>, <28 1>, <29 0>, <29 1>, | |
<30 0>, <30 1>, <31 0>, <31 1>; | |
}; | |
gpx2: gpx2 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpx3: gpx3 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
}; | |
pinctrl@13410000 { | |
gpc0: gpc0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpc1: gpc1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpc2: gpc2 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpc3: gpc3 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpc4: gpc4 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpd1: gpd1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpy0: gpy0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
}; | |
gpy1: gpy1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
}; | |
gpy2: gpy2 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
}; | |
gpy3: gpy3 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
}; | |
gpy4: gpy4 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
}; | |
gpy5: gpy5 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
}; | |
gpy6: gpy6 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
}; | |
}; | |
pinctrl@14000000 { | |
gpe0: gpe0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpe1: gpe1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpf0: gpf0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpf1: gpf1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpg0: gpg0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpg1: gpg1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpg2: gpg2 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpj4: gpj4 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
}; | |
pinctrl@14010000 { | |
gpa0: gpa0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpa1: gpa1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpa2: gpa2 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpb0: gpb0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpb1: gpb1 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpb2: gpb2 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpb3: gpb3 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gpb4: gpb4 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
gph0: gph0 { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
}; | |
pinctrl@03860000 { | |
gpz: gpz { | |
gpio-controller; | |
#gpio-cells = <2>; | |
interrupt-controller; | |
#interrupt-cells = <2>; | |
}; | |
}; | |
}; |