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git01.mediatek.com / filogic / uboot / b6f9cbb7e8e3c98d97bfb4d38b724c84d84d6ab1 / . / arch / arm / mach-socfpga / include / mach
tree: d6c92fb1fa2dce766d8469f5d4463db5d9c75bad [path history] [tgz]
  1. base_addr_a10.h
  2. base_addr_ac5.h
  3. base_addr_s10.h
  4. boot0.h
  5. clock_manager.h
  6. clock_manager_arria10.h
  7. clock_manager_gen5.h
  8. clock_manager_s10.h
  9. fpga_manager.h
  10. fpga_manager_arria10.h
  11. fpga_manager_gen5.h
  12. freeze_controller.h
  13. gpio.h
  14. handoff_s10.h
  15. misc.h
  16. nic301.h
  17. pinmux.h
  18. reset_manager.h
  19. reset_manager_arria10.h
  20. reset_manager_gen5.h
  21. reset_manager_s10.h
  22. scan_manager.h
  23. scu.h
  24. sdram.h
  25. sdram_arria10.h
  26. sdram_gen5.h
  27. system_manager.h
  28. system_manager_arria10.h
  29. system_manager_gen5.h
  30. system_manager_s10.h
  31. timer.h