dts/upstream/Bindings/arm/hisilicon/controller/sysctrl.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/hisilicon/controller/sysctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Hisilicon system controller

maintainers:
  - Wei Xu <xuwei5@hisilicon.com>

description: |
  The Hisilicon system controller is used on many Hisilicon boards, it can be
  used to assist the slave core startup, reboot the system, etc.

  There are some variants of the Hisilicon system controller, such as HiP01,
  Hi3519, Hi6220 system controller, each of them is mostly compatible with the
  Hisilicon system controller, but some same registers located at different
  offset. In addition, the HiP01 system controller has some specific control
  registers for HIP01 SoC family, such as slave core boot.

  The compatible names of each system controller are as follows:
  Hisilicon system controller   --> hisilicon,sysctrl
  HiP01     system controller   --> hisilicon,hip01-sysctrl
  Hi6220    system controller   --> hisilicon,hi6220-sysctrl
  Hi3519    system controller   --> hisilicon,hi3519-sysctrl

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: hisilicon,hi6220-sysctrl
    then:
      required:
        - '#clock-cells'

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - hisilicon,sysctrl
              - hisilicon,hi6220-sysctrl
              - hisilicon,hi3519-sysctrl
          - const: syscon
      - items:
          - const: hisilicon,hip01-sysctrl
          - const: hisilicon,sysctrl

  reg:
    maxItems: 1

  smp-offset:
    description: |
      offset in sysctrl for notifying slave cpu booting
      cpu 1, reg;
      cpu 2, reg + 0x4;
      cpu 3, reg + 0x8;
      If reg value is not zero, cpun exit wfi and go
    $ref: /schemas/types.yaml#/definitions/uint32

  resume-offset:
    description: offset in sysctrl for notifying cpu0 when resume
    $ref: /schemas/types.yaml#/definitions/uint32

  reboot-offset:
    description: offset in sysctrl for system reboot
    $ref: /schemas/types.yaml#/definitions/uint32

  '#clock-cells':
    const: 1

  '#reset-cells':
    const: 1

  '#address-cells':
    const: 1

  '#size-cells':
    const: 1

  ranges: true

patternProperties:
  '^clock@':
    type: object
    additionalProperties: false

    properties:
      compatible:
        enum:
          - hisilicon,hi3620-clock
          - hisilicon,hi3620-mmc-clock

      reg:
        maxItems: 1

      '#clock-cells':
        const: 1

required:
  - compatible
  - reg

additionalProperties:
  type: object

examples:
  - |
    /* Hisilicon system controller */
    system-controller@802000 {
        compatible = "hisilicon,sysctrl", "syscon";
        #address-cells = <1>;
        #size-cells = <1>;
        ranges = <0 0x802000 0x1000>;
        reg = <0x802000 0x1000>;

        smp-offset = <0x31c>;
        resume-offset = <0x308>;
        reboot-offset = <0x4>;

        clock: clock@0 {
            compatible = "hisilicon,hi3620-clock";
            reg = <0 0x10000>;
            #clock-cells = <1>;
        };
    };

    /* HiP01 system controller */
    system-controller@10000000 {
        compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl";
        reg = <0x10000000 0x1000>;
        reboot-offset = <0x4>;
    };

    /* Hi6220 system controller */
    system-controller@f7030000 {
        compatible = "hisilicon,hi6220-sysctrl", "syscon";
        reg = <0xf7030000 0x2000>;
        #clock-cells = <1>;
    };

    /* Hi3519 system controller */
    system-controller@12010000 {
        compatible = "hisilicon,hi3519-sysctrl", "syscon";
        reg = <0x12010000 0x1000>;
    };
...