arch/arm/dts/socfpga_cyclone5_dbm_soc1.dts

/*
 * Copyright (C) 2018 Marek Vasut <marex@denx.de>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include "socfpga_cyclone5.dtsi"

/ {
	model = "Devboards.de DBM-SoC1";
	compatible = "altr,socfpga-cyclone5", "altr,socfpga";

	chosen {
		bootargs = "console=ttyS0,115200";
	};

	aliases {
		ethernet0 = &gmac1;
		udc0 = &usb1;
	};

	memory {
		name = "memory";
		device_type = "memory";
		reg = <0x0 0x40000000>; /* 1GB */
	};

	soc {
		u-boot,dm-pre-reloc;
	};
};

&gmac1 {
	status = "okay";
	phy-mode = "rgmii";
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&gpio2 {
	status = "okay";
};

&mmc0 {
	status = "okay";
	bus-width = <4>;
	u-boot,dm-pre-reloc;
};

&usb1 {
	disable-over-current;
	status = "okay";
};