| commit | ad4bb01f9d44c208bcbdbf158f1bb3916661ccde | [log] [tgz] |
|---|---|---|
| author | Stefan Agner <stefan@agner.ch> | Wed Apr 23 18:17:51 2014 +0200 |
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | Sun May 25 15:46:12 2014 +0200 |
| tree | 87c48bc6742a97768be857d92f18976665d3feef | |
| parent | 7c5eca759f34c045b118feaa8235a5c556e4b23a [diff] |
arm: vf610: add DDR_SEL_PAD_CONTR register Set DDR_SEL_PAD_CONTR register explicitly to DDR3 which solves RAM issues with newer silicon (1.1). This register was added in revision 4 of the Vybrid Reference Manual. Signed-off-by: Stefan Agner <stefan@agner.ch>