commit a846799d534ccda0468ab93617fc6e7d73a3b20d
author Wolfgang Denk <wd@pollux.denx.de> Wed May 03 01:24:04 2006 +0200
committer Wolfgang Denk <wd@pollux.denx.de> Wed May 03 01:24:04 2006 +0200
tree 31d7b61fbfd7421441d44d0c47c580c722c69465
parent 21d05833f0a53149d59da90b0ab8d9657cd6f4fc

Coding Style cleanup

board/nc650/nand.c

diff --git a/board/nc650/nand.c b/board/nc650/nand.c
index f27e536..de54386 100644
--- a/board/nc650/nand.c
+++ b/board/nc650/nand.c
@@ -37,22 +37,22 @@
 	struct nand_chip *this = mtd->priv;
 
 	switch(cmd) {
-		case NAND_CTL_SETCLE:
-			this->IO_ADDR_W += 2;
-			break;
-		case NAND_CTL_CLRCLE:
-			this->IO_ADDR_W -= 2;
-			break;
-		case NAND_CTL_SETALE:
-			this->IO_ADDR_W += 1;
-			break;
-		case NAND_CTL_CLRALE:
-			this->IO_ADDR_W -= 1;
-			break;
-		case NAND_CTL_SETNCE:
-		case NAND_CTL_CLRNCE:
-			/* nop */
-			break;
+	case NAND_CTL_SETCLE:
+		this->IO_ADDR_W += 2;
+		break;
+	case NAND_CTL_CLRCLE:
+		this->IO_ADDR_W -= 2;
+		break;
+	case NAND_CTL_SETALE:
+		this->IO_ADDR_W += 1;
+		break;
+	case NAND_CTL_CLRALE:
+		this->IO_ADDR_W -= 1;
+		break;
+	case NAND_CTL_SETNCE:
+	case NAND_CTL_CLRNCE:
+		/* nop */
+		break;
 	}
 }
 #elif defined(CONFIG_IDS852_REV2)
@@ -64,24 +64,24 @@
 	struct nand_chip *this = mtd->priv;
 
 	switch(cmd) {
-		case NAND_CTL_SETCLE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0xa) = 0; 
-			break;
-		case NAND_CTL_CLRCLE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
-			break;
-		case NAND_CTL_SETALE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x9) = 0; 
-			break;
-		case NAND_CTL_CLRALE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
-			break;
-		case NAND_CTL_SETNCE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
-			break;
-		case NAND_CTL_CLRNCE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0xc) = 0; 
-			break;
+	case NAND_CTL_SETCLE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0xa) = 0;
+		break;
+	case NAND_CTL_CLRCLE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
+		break;
+	case NAND_CTL_SETALE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0x9) = 0;
+		break;
+	case NAND_CTL_CLRALE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
+		break;
+	case NAND_CTL_SETNCE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
+		break;
+	case NAND_CTL_CLRNCE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0xc) = 0;
+		break;
 	}
 }
 #else