Coding Style cleanup
diff --git a/board/nc650/nand.c b/board/nc650/nand.c
index f27e536..de54386 100644
--- a/board/nc650/nand.c
+++ b/board/nc650/nand.c
@@ -37,22 +37,22 @@
 	struct nand_chip *this = mtd->priv;
 
 	switch(cmd) {
-		case NAND_CTL_SETCLE:
-			this->IO_ADDR_W += 2;
-			break;
-		case NAND_CTL_CLRCLE:
-			this->IO_ADDR_W -= 2;
-			break;
-		case NAND_CTL_SETALE:
-			this->IO_ADDR_W += 1;
-			break;
-		case NAND_CTL_CLRALE:
-			this->IO_ADDR_W -= 1;
-			break;
-		case NAND_CTL_SETNCE:
-		case NAND_CTL_CLRNCE:
-			/* nop */
-			break;
+	case NAND_CTL_SETCLE:
+		this->IO_ADDR_W += 2;
+		break;
+	case NAND_CTL_CLRCLE:
+		this->IO_ADDR_W -= 2;
+		break;
+	case NAND_CTL_SETALE:
+		this->IO_ADDR_W += 1;
+		break;
+	case NAND_CTL_CLRALE:
+		this->IO_ADDR_W -= 1;
+		break;
+	case NAND_CTL_SETNCE:
+	case NAND_CTL_CLRNCE:
+		/* nop */
+		break;
 	}
 }
 #elif defined(CONFIG_IDS852_REV2)
@@ -64,24 +64,24 @@
 	struct nand_chip *this = mtd->priv;
 
 	switch(cmd) {
-		case NAND_CTL_SETCLE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0xa) = 0; 
-			break;
-		case NAND_CTL_CLRCLE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
-			break;
-		case NAND_CTL_SETALE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x9) = 0; 
-			break;
-		case NAND_CTL_CLRALE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
-			break;
-		case NAND_CTL_SETNCE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0; 
-			break;
-		case NAND_CTL_CLRNCE:
- 			*(((volatile __u8 *) this->IO_ADDR_W) + 0xc) = 0; 
-			break;
+	case NAND_CTL_SETCLE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0xa) = 0;
+		break;
+	case NAND_CTL_CLRCLE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
+		break;
+	case NAND_CTL_SETALE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0x9) = 0;
+		break;
+	case NAND_CTL_CLRALE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
+		break;
+	case NAND_CTL_SETNCE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0x8) = 0;
+		break;
+	case NAND_CTL_CLRNCE:
+		*(((volatile __u8 *) this->IO_ADDR_W) + 0xc) = 0;
+		break;
 	}
 }
 #else
diff --git a/board/nc650/nc650.c b/board/nc650/nc650.c
index c90ac9c..8a6b5b0 100644
--- a/board/nc650/nc650.c
+++ b/board/nc650/nc650.c
@@ -265,8 +265,8 @@
 	int             iCompatMode = 0;
 	char            *pParam = NULL;
 	char            *envlb;
-	
-	/* 
+
+	/*
 	   First byte in CPLD read address space signals compatibility mode
 	   0 - cp850
 	   1 - kp852
@@ -274,9 +274,9 @@
 	pParam = (char*)(CFG_CPLD_BASE);
 	if( *pParam != 0)
 		iCompatMode = 1;
-	
+
 	if ( iCompatMode != 0) {
-		/* 
+		/*
 		   In KP852 compatibility mode we have to write to
 		   DPRAM as early as possible the binary coded
 		   line config and board name.
@@ -288,7 +288,7 @@
 			setenv( DPRAM_VARNAME, DEFAULT_LB);
 			envlb = DEFAULT_LB;
 		}
-		
+
 		/* Status string */
 		printf("Mode:  KP852(LB=%s)\n", envlb);
 
@@ -305,7 +305,7 @@
 	} else {
 		puts("Mode:  CP850\n");
 	}
-	
+
 	return 0;
 }
 #endif