| // SPDX-License-Identifier: GPL-2.0 |
| /* |
| * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ |
| */ |
| |
| /dts-v1/; |
| |
| #include "k3-j7200-som-p0.dtsi" |
| #include "k3-j7200-ddr-evm-lp4-2666.dtsi" |
| #include "k3-j721e-ddr.dtsi" |
| |
| / { |
| aliases { |
| remoteproc0 = &sysctrler; |
| remoteproc1 = &a72_0; |
| }; |
| |
| chosen { |
| stdout-path = &main_uart0; |
| tick-timer = &timer1; |
| firmware-loader = &fs_loader0; |
| }; |
| |
| fs_loader0: fs_loader@0 { |
| u-boot,dm-pre-reloc; |
| compatible = "u-boot,fs-loader"; |
| }; |
| |
| a72_0: a72@0 { |
| compatible = "ti,am654-rproc"; |
| reg = <0x0 0x00a90000 0x0 0x10>; |
| power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, |
| <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>; |
| resets = <&k3_reset 202 0>; |
| clocks = <&k3_clks 61 1>; |
| assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>; |
| assigned-clock-rates = <2000000000>, <200000000>; |
| ti,sci = <&dmsc>; |
| ti,sci-proc-id = <32>; |
| ti,sci-host-id = <10>; |
| u-boot,dm-spl; |
| }; |
| |
| clk_200mhz: dummy_clock_200mhz { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <200000000>; |
| u-boot,dm-spl; |
| }; |
| |
| clk_19_2mhz: dummy_clock_19_2mhz { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <19200000>; |
| u-boot,dm-spl; |
| }; |
| }; |
| |
| &memorycontroller { |
| power-domains = <&k3_pds 8 TI_SCI_PD_SHARED>, |
| <&k3_pds 90 TI_SCI_PD_SHARED>; |
| clocks = <&k3_clks 8 5>, <&k3_clks 30 9>; |
| }; |
| |
| &cbass_mcu_wakeup { |
| mcu_secproxy: secproxy@2a380000 { |
| u-boot,dm-spl; |
| compatible = "ti,am654-secure-proxy"; |
| reg = <0x0 0x2a380000 0x0 0x80000>, |
| <0x0 0x2a400000 0x0 0x80000>, |
| <0x0 0x2a480000 0x0 0x80000>; |
| reg-names = "rt", "scfg", "target_data"; |
| #mbox-cells = <1>; |
| }; |
| |
| sysctrler: sysctrler { |
| u-boot,dm-spl; |
| compatible = "ti,am654-system-controller"; |
| mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>; |
| mbox-names = "tx", "rx"; |
| }; |
| |
| dm_tifs: dm-tifs { |
| compatible = "ti,j721e-dm-sci"; |
| ti,host-id = <3>; |
| ti,secure-host; |
| mbox-names = "rx", "tx"; |
| mboxes= <&mcu_secproxy 21>, |
| <&mcu_secproxy 23>; |
| u-boot,dm-spl; |
| }; |
| }; |
| |
| &dmsc { |
| mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>; |
| mbox-names = "tx", "rx", "notify"; |
| ti,host-id = <4>; |
| ti,secure-host; |
| }; |
| |
| &wkup_pmx0 { |
| u-boot,dm-spl; |
| wkup_uart0_pins_default: wkup_uart0_pins_default { |
| u-boot,dm-spl; |
| pinctrl-single,pins = < |
| J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */ |
| J721E_WKUP_IOPAD(0xb4, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */ |
| >; |
| }; |
| |
| mcu_uart0_pins_default: mcu_uart0_pins_default { |
| u-boot,dm-spl; |
| pinctrl-single,pins = < |
| J721E_WKUP_IOPAD(0xf4, PIN_INPUT, 0) /* (D20) WKUP_GPIO0_13.MCU_UART0_RXD */ |
| J721E_WKUP_IOPAD(0xf0, PIN_OUTPUT, 0) /* (D19) WKUP_GPIO0_12.MCU_UART0_TXD */ |
| J721E_WKUP_IOPAD(0xf8, PIN_INPUT, 0) /* (E20) WKUP_GPIO0_14.MCU_UART0_CTSn */ |
| J721E_WKUP_IOPAD(0xfc, PIN_OUTPUT, 0) /* (E21) WKUP_GPIO0_15.MCU_UART0_RTSn */ |
| >; |
| }; |
| |
| wkup_i2c0_pins_default: wkup-i2c0-pins-default { |
| pinctrl-single,pins = < |
| J721E_WKUP_IOPAD(0x100, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */ |
| J721E_WKUP_IOPAD(0x104, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */ |
| >; |
| }; |
| |
| mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-pins-default { |
| pinctrl-single,pins = < |
| J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 1) /* (E20) MCU_OSPI0_CLK.MCU_HYPERBUS0_CK */ |
| J721E_WKUP_IOPAD(0x4, PIN_OUTPUT, 1) /* (C21) MCU_OSPI0_LBCLKO.MCU_HYPERBUS0_CKn */ |
| J721E_WKUP_IOPAD(0x2c, PIN_OUTPUT, 1) /* (F19) MCU_OSPI0_CSn0.MCU_HYPERBUS0_CSn0 */ |
| J721E_WKUP_IOPAD(0x54, PIN_OUTPUT, 3) /* (E22) MCU_OSPI1_CSn1.MCU_HYPERBUS0_CSn1 */ |
| J721E_WKUP_IOPAD(0x30, PIN_OUTPUT, 1) /* (E19) MCU_OSPI0_CSn1.MCU_HYPERBUS0_RESETn */ |
| J721E_WKUP_IOPAD(0x8, PIN_INPUT, 1) /* (D21) MCU_OSPI0_DQS.MCU_HYPERBUS0_RWDS */ |
| J721E_WKUP_IOPAD(0xc, PIN_INPUT, 1) /* (D20) MCU_OSPI0_D0.MCU_HYPERBUS0_DQ0 */ |
| J721E_WKUP_IOPAD(0x10, PIN_INPUT, 1) /* (G19) MCU_OSPI0_D1.MCU_HYPERBUS0_DQ1 */ |
| J721E_WKUP_IOPAD(0x14, PIN_INPUT, 1) /* (G20) MCU_OSPI0_D2.MCU_HYPERBUS0_DQ2 */ |
| J721E_WKUP_IOPAD(0x18, PIN_INPUT, 1) /* (F20) MCU_OSPI0_D3.MCU_HYPERBUS0_DQ3 */ |
| J721E_WKUP_IOPAD(0x1c, PIN_INPUT, 1) /* (F21) MCU_OSPI0_D4.MCU_HYPERBUS0_DQ4 */ |
| J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (E21) MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */ |
| J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (B22) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */ |
| J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (G21) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */ |
| >; |
| }; |
| |
| wkup_gpio_pins_default: wkup-gpio-pins-default { |
| pinctrl-single,pins = < |
| J721E_WKUP_IOPAD(0xd8, PIN_INPUT, 7) /* (C14) WKUP_GPIO0_6 */ |
| >; |
| }; |
| }; |
| |
| &main_pmx0 { |
| u-boot,dm-spl; |
| |
| main_uart0_pins_default: main_uart0_pins_default { |
| u-boot,dm-spl; |
| pinctrl-single,pins = < |
| J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */ |
| J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */ |
| J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */ |
| J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */ |
| >; |
| }; |
| |
| main_i2c0_pins_default: main-i2c0-pins-default { |
| u-boot,dm-spl; |
| pinctrl-single,pins = < |
| J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */ |
| J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ |
| >; |
| }; |
| |
| main_mmc1_pins_default: main_mmc1_pins_default { |
| pinctrl-single,pins = < |
| J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */ |
| J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */ |
| J721E_IOPAD(0xfc, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */ |
| J721E_IOPAD(0xf8, PIN_INPUT, 0) /* (M19) MMC1_DAT0 */ |
| J721E_IOPAD(0xf4, PIN_INPUT, 0) /* (N21) MMC1_DAT1 */ |
| J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */ |
| J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */ |
| J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */ |
| >; |
| }; |
| |
| main_usbss0_pins_default: main_usbss0_pins_default { |
| pinctrl-single,pins = < |
| J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */ |
| >; |
| }; |
| }; |
| |
| &wkup_uart0 { |
| u-boot,dm-spl; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&wkup_uart0_pins_default>; |
| status = "okay"; |
| }; |
| |
| &mcu_uart0 { |
| /delete-property/ power-domains; |
| /delete-property/ clocks; |
| /delete-property/ clock-names; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mcu_uart0_pins_default>; |
| status = "okay"; |
| clock-frequency = <96000000>; |
| }; |
| |
| &main_uart0 { |
| status = "okay"; |
| power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_uart0_pins_default>; |
| status = "okay"; |
| }; |
| |
| &main_sdhci0 { |
| /delete-property/ power-domains; |
| /delete-property/ assigned-clocks; |
| /delete-property/ assigned-clock-parents; |
| pinctrl-0 = <&main_mmc1_pins_default>; |
| pinctrl-names = "default"; |
| clock-names = "clk_xin"; |
| clocks = <&clk_200mhz>; |
| ti,driver-strength-ohm = <50>; |
| non-removable; |
| bus-width = <8>; |
| }; |
| |
| &main_sdhci1 { |
| /delete-property/ power-domains; |
| /delete-property/ assigned-clocks; |
| /delete-property/ assigned-clock-parents; |
| clock-names = "clk_xin"; |
| clocks = <&clk_200mhz>; |
| ti,driver-strength-ohm = <50>; |
| }; |
| |
| &main_i2c0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_i2c0_pins_default>; |
| clock-frequency = <400000>; |
| |
| exp1: gpio@20 { |
| compatible = "ti,tca6416"; |
| reg = <0x20>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| exp2: gpio@22 { |
| compatible = "ti,tca6424"; |
| reg = <0x22>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| }; |
| |
| &usbss0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_usbss0_pins_default>; |
| ti,vbus-divider; |
| ti,usb2-only; |
| }; |
| |
| &usb0 { |
| dr_mode = "otg"; |
| maximum-speed = "high-speed"; |
| }; |
| |
| &hbmc { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mcu_fss0_hpb0_pins_default>; |
| reg = <0x0 0x47040000 0x0 0x100>, |
| <0x0 0x50000000 0x0 0x8000000>; |
| ranges = <0x0 0x0 0x0 0x50000000 0x4000000>, /* 64MB Flash on CS0 */ |
| <0x1 0x0 0x0 0x54000000 0x800000>; /* 8MB flash on CS1 */ |
| |
| flash@0,0 { |
| compatible = "cypress,hyperflash", "cfi-flash"; |
| reg = <0x0 0x0 0x4000000>; |
| }; |
| }; |
| |
| &mcu_ringacc { |
| ti,sci = <&dm_tifs>; |
| }; |
| |
| &mcu_udmap { |
| ti,sci = <&dm_tifs>; |
| }; |
| #include "k3-j7200-common-proc-board-u-boot.dtsi" |