dts/upstream/src/arm64/renesas/r8a779h0-gray-hawk-single.dts

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
 * Device Tree Source for the R-Car V4M Gray Hawk Single board
 *
 * Copyright (C) 2023 Renesas Electronics Corp.
 * Copyright (C) 2024 Glider bv
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>

#include "r8a779h0.dtsi"

/ {
	model = "Renesas Gray Hawk Single board based on r8a779h0";
	compatible = "renesas,gray-hawk-single", "renesas,r8a779h0";

	aliases {
		serial0 = &hscif0;
		serial1 = &hscif2;
		ethernet0 = &avb0;
	};

	chosen {
		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
		stdout-path = "serial0:921600n8";
	};

	memory@48000000 {
		device_type = "memory";
		/* first 128MB is reserved for secure area. */
		reg = <0x0 0x48000000 0x0 0x78000000>;
	};

	memory@480000000 {
		device_type = "memory";
		reg = <0x4 0x80000000 0x1 0x80000000>;
	};

	reg_1p8v: regulator-1p8v {
			compatible = "regulator-fixed";
			regulator-name = "fixed-1.8V";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-boot-on;
			regulator-always-on;
	};

	reg_3p3v: regulator-3p3v {
			compatible = "regulator-fixed";
			regulator-name = "fixed-3.3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-boot-on;
			regulator-always-on;
	};
};

&avb0 {
	pinctrl-0 = <&avb0_pins>;
	pinctrl-names = "default";
	phy-handle = <&phy0>;
	tx-internal-delay-ps = <2000>;
	status = "okay";

	phy0: ethernet-phy@0 {
		compatible = "ethernet-phy-id0022.1622",
			     "ethernet-phy-ieee802.3-c22";
		rxc-skew-ps = <1500>;
		reg = <0>;
		interrupt-parent = <&gpio7>;
		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
		reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
	};
};

&extal_clk {
	clock-frequency = <16666666>;
};

&extalr_clk {
	clock-frequency = <32768>;
};

&hscif0 {
	pinctrl-0 = <&hscif0_pins>;
	pinctrl-names = "default";

	uart-has-rtscts;
	status = "okay";
};

&hscif2 {
	pinctrl-0 = <&hscif2_pins>;
	pinctrl-names = "default";

	uart-has-rtscts;
	status = "okay";
};

&i2c0 {
	pinctrl-0 = <&i2c0_pins>;
	pinctrl-names = "default";

	status = "okay";
	clock-frequency = <400000>;

	eeprom@50 {
		compatible = "rohm,br24g01", "atmel,24c01";
		label = "cpu-board";
		reg = <0x50>;
		pagesize = <8>;
	};

	eeprom@51 {
		compatible = "rohm,br24g01", "atmel,24c01";
		label = "breakout-board";
		reg = <0x51>;
		pagesize = <8>;
	};

	eeprom@52 {
		compatible = "rohm,br24g01", "atmel,24c01";
		label = "csi-dsi-sub-board-id";
		reg = <0x52>;
		pagesize = <8>;
	};

	eeprom@53 {
		compatible = "rohm,br24g01", "atmel,24c01";
		label = "ethernet-sub-board-id";
		reg = <0x53>;
		pagesize = <8>;
	};
};

&mmc0 {
	pinctrl-0 = <&mmc_pins>;
	pinctrl-1 = <&mmc_pins>;
	pinctrl-names = "default", "state_uhs";

	vmmc-supply = <&reg_3p3v>;
	vqmmc-supply = <&reg_1p8v>;
	mmc-hs200-1_8v;
	mmc-hs400-1_8v;
	bus-width = <8>;
	no-sd;
	no-sdio;
	non-removable;
	full-pwr-cycle-in-suspend;
	status = "okay";
};

&pfc {
	pinctrl-0 = <&scif_clk_pins>, <&scif_clk2_pins>;
	pinctrl-names = "default";

	avb0_pins: avb0 {
		mux {
			groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
				 "avb0_txcrefclk";
			function = "avb0";
		};

		pins_mdio {
			groups = "avb0_mdio";
			drive-strength = <21>;
		};

		pins_mii {
			groups = "avb0_rgmii";
			drive-strength = <21>;
		};
	};

	hscif0_pins: hscif0 {
		groups = "hscif0_data", "hscif0_ctrl";
		function = "hscif0";
	};

	hscif2_pins: hscif2 {
		groups = "hscif2_data", "hscif2_ctrl";
		function = "hscif2";
	};

	i2c0_pins: i2c0 {
		groups = "i2c0";
		function = "i2c0";
	};

	mmc_pins: mmc {
		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
		function = "mmc";
		power-source = <1800>;
	};

	qspi0_pins: qspi0 {
		groups = "qspi0_ctrl", "qspi0_data4";
		function = "qspi0";
	};

	scif_clk_pins: scif-clk {
		groups = "scif_clk";
		function = "scif_clk";
	};

	scif_clk2_pins: scif-clk2 {
		groups = "scif_clk2";
		function = "scif_clk2";
	};
};

&rpc {
	pinctrl-0 = <&qspi0_pins>;
	pinctrl-names = "default";

	status = "okay";

	flash@0 {
		compatible = "spansion,s25fs512s", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <40000000>;
		spi-rx-bus-width = <4>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			boot@0 {
				reg = <0x0 0x1200000>;
				read-only;
			};
			user@1200000 {
				reg = <0x1200000 0x2e00000>;
			};
		};
	};
};

&rwdt {
	timeout-sec = <60>;
	status = "okay";
};

&scif_clk {
	clock-frequency = <24000000>;
};

&scif_clk2 {
	clock-frequency = <24000000>;
};