| // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) |
| /* |
| * Copyright (C) STMicroelectronics 2023 - All Rights Reserved |
| * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics. |
| */ |
| #include <dt-bindings/pinctrl/stm32-pinfunc.h> |
| |
| &pinctrl { |
| eth2_rgmii_pins_a: eth2-rgmii-0 { |
| pins1 { |
| pinmux = <STM32_PINMUX('C', 7, AF10)>, /* ETH_RGMII_TXD0 */ |
| <STM32_PINMUX('C', 8, AF10)>, /* ETH_RGMII_TXD1 */ |
| <STM32_PINMUX('C', 9, AF10)>, /* ETH_RGMII_TXD2 */ |
| <STM32_PINMUX('C', 10, AF10)>, /* ETH_RGMII_TXD3 */ |
| <STM32_PINMUX('C', 4, AF10)>; /* ETH_RGMII_TX_CTL */ |
| bias-disable; |
| drive-push-pull; |
| slew-rate = <3>; |
| }; |
| pins2 { |
| pinmux = <STM32_PINMUX('F', 8, AF10)>, /* ETH_RGMII_CLK125 */ |
| <STM32_PINMUX('F', 7, AF10)>, /* ETH_RGMII_GTX_CLK */ |
| <STM32_PINMUX('C', 6, AF10)>; /* ETH_MDC */ |
| bias-disable; |
| drive-push-pull; |
| slew-rate = <3>; |
| }; |
| pins3 { |
| pinmux = <STM32_PINMUX('C', 5, AF10)>; /* ETH_MDIO */ |
| bias-disable; |
| drive-push-pull; |
| slew-rate = <0>; |
| }; |
| pins4 { |
| pinmux = <STM32_PINMUX('G', 0, AF10)>, /* ETH_RGMII_RXD0 */ |
| <STM32_PINMUX('C', 12, AF10)>, /* ETH_RGMII_RXD1 */ |
| <STM32_PINMUX('F', 9, AF10)>, /* ETH_RGMII_RXD2 */ |
| <STM32_PINMUX('C', 11, AF10)>, /* ETH_RGMII_RXD3 */ |
| <STM32_PINMUX('C', 3, AF10)>; /* ETH_RGMII_RX_CTL */ |
| bias-disable; |
| }; |
| pins5 { |
| pinmux = <STM32_PINMUX('F', 6, AF10)>; /* ETH_RGMII_RX_CLK */ |
| bias-disable; |
| }; |
| }; |
| |
| eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 { |
| pins { |
| pinmux = <STM32_PINMUX('C', 7, ANALOG)>, /* ETH_RGMII_TXD0 */ |
| <STM32_PINMUX('C', 8, ANALOG)>, /* ETH_RGMII_TXD1 */ |
| <STM32_PINMUX('C', 9, ANALOG)>, /* ETH_RGMII_TXD2 */ |
| <STM32_PINMUX('C', 10, ANALOG)>, /* ETH_RGMII_TXD3 */ |
| <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_TX_CTL */ |
| <STM32_PINMUX('F', 8, ANALOG)>, /* ETH_RGMII_CLK125 */ |
| <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RGMII_GTX_CLK */ |
| <STM32_PINMUX('C', 6, ANALOG)>, /* ETH_MDC */ |
| <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_MDIO */ |
| <STM32_PINMUX('G', 0, ANALOG)>, /* ETH_RGMII_RXD0 */ |
| <STM32_PINMUX('C', 12, ANALOG)>, /* ETH_RGMII_RXD1 */ |
| <STM32_PINMUX('F', 9, ANALOG)>, /* ETH_RGMII_RXD2 */ |
| <STM32_PINMUX('C', 11, ANALOG)>, /* ETH_RGMII_RXD3 */ |
| <STM32_PINMUX('C', 3, ANALOG)>, /* ETH_RGMII_RX_CTL */ |
| <STM32_PINMUX('F', 6, ANALOG)>; /* ETH_RGMII_RX_CLK */ |
| }; |
| }; |
| |
| i2c2_pins_a: i2c2-0 { |
| pins { |
| pinmux = <STM32_PINMUX('B', 5, AF9)>, /* I2C2_SCL */ |
| <STM32_PINMUX('B', 4, AF9)>; /* I2C2_SDA */ |
| bias-disable; |
| drive-open-drain; |
| slew-rate = <0>; |
| }; |
| }; |
| |
| i2c2_sleep_pins_a: i2c2-sleep-0 { |
| pins { |
| pinmux = <STM32_PINMUX('B', 5, ANALOG)>, /* I2C2_SCL */ |
| <STM32_PINMUX('B', 4, ANALOG)>; /* I2C2_SDA */ |
| }; |
| }; |
| |
| sdmmc1_b4_pins_a: sdmmc1-b4-0 { |
| pins1 { |
| pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */ |
| <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */ |
| <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */ |
| <STM32_PINMUX('E', 1, AF10)>, /* SDMMC1_D3 */ |
| <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */ |
| slew-rate = <2>; |
| drive-push-pull; |
| bias-disable; |
| }; |
| pins2 { |
| pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */ |
| slew-rate = <3>; |
| drive-push-pull; |
| bias-disable; |
| }; |
| }; |
| |
| sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { |
| pins1 { |
| pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */ |
| <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */ |
| <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */ |
| <STM32_PINMUX('E', 1, AF10)>; /* SDMMC1_D3 */ |
| slew-rate = <2>; |
| drive-push-pull; |
| bias-disable; |
| }; |
| pins2 { |
| pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */ |
| slew-rate = <3>; |
| drive-push-pull; |
| bias-disable; |
| }; |
| pins3 { |
| pinmux = <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */ |
| slew-rate = <2>; |
| drive-open-drain; |
| bias-disable; |
| }; |
| }; |
| |
| sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { |
| pins { |
| pinmux = <STM32_PINMUX('E', 4, ANALOG)>, /* SDMMC1_D0 */ |
| <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC1_D1 */ |
| <STM32_PINMUX('E', 0, ANALOG)>, /* SDMMC1_D2 */ |
| <STM32_PINMUX('E', 1, ANALOG)>, /* SDMMC1_D3 */ |
| <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC1_CK */ |
| <STM32_PINMUX('E', 2, ANALOG)>; /* SDMMC1_CMD */ |
| }; |
| }; |
| |
| spi3_pins_a: spi3-0 { |
| pins1 { |
| pinmux = <STM32_PINMUX('B', 7, AF1)>, /* SPI3_SCK */ |
| <STM32_PINMUX('B', 8, AF1)>; /* SPI3_MOSI */ |
| drive-push-pull; |
| bias-disable; |
| slew-rate = <1>; |
| }; |
| pins2 { |
| pinmux = <STM32_PINMUX('B', 10, AF1)>; /* SPI3_MISO */ |
| bias-disable; |
| }; |
| }; |
| |
| spi3_sleep_pins_a: spi3-sleep-0 { |
| pins1 { |
| pinmux = <STM32_PINMUX('B', 7, ANALOG)>, /* SPI3_SCK */ |
| <STM32_PINMUX('B', 8, ANALOG)>, /* SPI3_MOSI */ |
| <STM32_PINMUX('B', 10, ANALOG)>; /* SPI3_MISO */ |
| }; |
| }; |
| |
| usart2_pins_a: usart2-0 { |
| pins1 { |
| pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */ |
| bias-disable; |
| drive-push-pull; |
| slew-rate = <0>; |
| }; |
| pins2 { |
| pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */ |
| bias-disable; |
| }; |
| }; |
| |
| usart2_idle_pins_a: usart2-idle-0 { |
| pins1 { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>; /* USART2_TX */ |
| }; |
| pins2 { |
| pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */ |
| bias-disable; |
| }; |
| }; |
| |
| usart2_sleep_pins_a: usart2-sleep-0 { |
| pins { |
| pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */ |
| <STM32_PINMUX('A', 8, ANALOG)>; /* USART2_RX */ |
| }; |
| }; |
| |
| usart6_pins_a: usart6-0 { |
| pins1 { |
| pinmux = <STM32_PINMUX('F', 13, AF3)>, /* USART6_TX */ |
| <STM32_PINMUX('G', 5, AF3)>; /* USART6_RTS */ |
| bias-disable; |
| drive-push-pull; |
| slew-rate = <0>; |
| }; |
| pins2 { |
| pinmux = <STM32_PINMUX('F', 14, AF3)>, /* USART6_RX */ |
| <STM32_PINMUX('F', 15, AF3)>; /* USART6_CTS_NSS */ |
| bias-pull-up; |
| }; |
| }; |
| |
| usart6_idle_pins_a: usart6-idle-0 { |
| pins1 { |
| pinmux = <STM32_PINMUX('F', 13, ANALOG)>, /* USART6_TX */ |
| <STM32_PINMUX('F', 15, ANALOG)>; /* USART6_CTS_NSS */ |
| }; |
| pins2 { |
| pinmux = <STM32_PINMUX('G', 5, AF3)>; /* USART6_RTS */ |
| bias-disable; |
| drive-push-pull; |
| slew-rate = <0>; |
| }; |
| pins3 { |
| pinmux = <STM32_PINMUX('F', 14, AF3)>; /* USART6_RX */ |
| bias-pull-up; |
| }; |
| }; |
| |
| usart6_sleep_pins_a: usart6-sleep-0 { |
| pins { |
| pinmux = <STM32_PINMUX('F', 13, ANALOG)>, /* USART6_TX */ |
| <STM32_PINMUX('G', 5, ANALOG)>, /* USART6_RTS */ |
| <STM32_PINMUX('F', 15, ANALOG)>, /* USART6_CTS_NSS */ |
| <STM32_PINMUX('F', 14, ANALOG)>; /* USART6_RX */ |
| }; |
| }; |
| }; |
| |
| &pinctrl_z { |
| i2c8_pins_a: i2c8-0 { |
| pins { |
| pinmux = <STM32_PINMUX('Z', 4, AF8)>, /* I2C8_SCL */ |
| <STM32_PINMUX('Z', 3, AF8)>; /* I2C8_SDA */ |
| bias-disable; |
| drive-open-drain; |
| slew-rate = <0>; |
| }; |
| }; |
| |
| i2c8_sleep_pins_a: i2c8-sleep-0 { |
| pins { |
| pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C8_SCL */ |
| <STM32_PINMUX('Z', 3, ANALOG)>; /* I2C8_SDA */ |
| }; |
| }; |
| }; |
| |
| &pinctrl_z { |
| spi8_pins_a: spi8-0 { |
| pins1 { |
| pinmux = <STM32_PINMUX('Z', 2, AF3)>, /* SPI8_SCK */ |
| <STM32_PINMUX('Z', 0, AF3)>; /* SPI8_MOSI */ |
| drive-push-pull; |
| bias-disable; |
| slew-rate = <1>; |
| }; |
| pins2 { |
| pinmux = <STM32_PINMUX('Z', 1, AF3)>; /* SPI8_MISO */ |
| bias-disable; |
| }; |
| }; |
| |
| spi8_sleep_pins_a: spi8-sleep-0 { |
| pins1 { |
| pinmux = <STM32_PINMUX('Z', 2, ANALOG)>, /* SPI8_SCK */ |
| <STM32_PINMUX('Z', 0, ANALOG)>, /* SPI8_MOSI */ |
| <STM32_PINMUX('Z', 1, ANALOG)>; /* SPI8_MISO */ |
| }; |
| }; |
| }; |