| /* |
| * Copyright 2013 Freescale Semiconductor, Inc. |
| * |
| * Configuration settings for the Freescale Vybrid vf610twr board. |
| * |
| * SPDX-License-Identifier: GPL-2.0+ |
| */ |
| |
| #ifndef __CONFIG_H |
| #define __CONFIG_H |
| |
| #include <asm/arch/imx-regs.h> |
| |
| #define CONFIG_SYS_FSL_CLK |
| |
| #define CONFIG_MACH_TYPE 4146 |
| |
| #define CONFIG_SKIP_LOWLEVEL_INIT |
| |
| /* Enable passing of ATAGs */ |
| #define CONFIG_CMDLINE_TAG |
| |
| #ifdef CONFIG_CMD_FUSE |
| #define CONFIG_MXC_OCOTP |
| #endif |
| |
| /* Size of malloc() pool */ |
| #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) |
| |
| /* Allow to overwrite serial and ethaddr */ |
| #define CONFIG_ENV_OVERWRITE |
| |
| /* NAND support */ |
| #define CONFIG_SYS_NAND_ONFI_DETECTION |
| |
| #ifdef CONFIG_CMD_NAND |
| #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR |
| |
| /* Dynamic MTD partition support */ |
| #define CONFIG_MTD_PARTITIONS |
| #define CONFIG_MTD_DEVICE |
| #define MTDIDS_DEFAULT "nand0=fsl_nfc" |
| #define MTDPARTS_DEFAULT "mtdparts=fsl_nfc:" \ |
| "128k(vf-bcb)ro," \ |
| "1408k(u-boot)ro," \ |
| "512k(u-boot-env)," \ |
| "4m(kernel)," \ |
| "512k(fdt)," \ |
| "-(rootfs)" |
| #endif |
| |
| #define CONFIG_FSL_ESDHC |
| #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| #define CONFIG_SYS_FSL_ESDHC_NUM 1 |
| |
| #define CONFIG_FEC_MXC |
| #define CONFIG_MII |
| #define IMX_FEC_BASE ENET_BASE_ADDR |
| #define CONFIG_FEC_XCV_TYPE RMII |
| #define CONFIG_FEC_MXC_PHYADDR 0 |
| |
| /* QSPI Configs*/ |
| |
| #ifdef CONFIG_FSL_QSPI |
| #define FSL_QSPI_FLASH_SIZE (1 << 24) |
| #define FSL_QSPI_FLASH_NUM 2 |
| #define CONFIG_SYS_FSL_QSPI_LE |
| #endif |
| |
| /* I2C Configs */ |
| #define CONFIG_SYS_I2C |
| #define CONFIG_SYS_I2C_MXC |
| #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
| #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ |
| #define CONFIG_SYS_SPD_BUS_NUM 0 |
| |
| |
| #define CONFIG_SYS_LOAD_ADDR 0x82000000 |
| |
| /* We boot from the gfxRAM area of the OCRAM. */ |
| #define CONFIG_SYS_TEXT_BASE 0x3f401000 |
| #define CONFIG_BOARD_SIZE_LIMIT 520192 |
| |
| /* |
| * We do have 128MB of memory on the Vybrid Tower board. Leave the last |
| * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from |
| * DDR3. Hence, limit the memory range for image processing to 112MB |
| * using bootm_size. All of the following must be within this range. |
| * We have the default load at 32MB into DDR (for the kernel), FDT at |
| * 64MB and the ramdisk 512KB above that (allowing for hopefully never |
| * seen large trees). This allows a reasonable split between ramdisk |
| * and kernel size, where the ram disk can be a bit larger. |
| */ |
| #define MEM_LAYOUT_ENV_SETTINGS \ |
| "bootm_size=0x07000000\0" \ |
| "loadaddr=0x82000000\0" \ |
| "kernel_addr_r=0x82000000\0" \ |
| "fdt_addr=0x84000000\0" \ |
| "fdt_addr_r=0x84000000\0" \ |
| "rdaddr=0x84080000\0" \ |
| "ramdisk_addr_r=0x84080000\0" |
| |
| #define CONFIG_EXTRA_ENV_SETTINGS \ |
| MEM_LAYOUT_ENV_SETTINGS \ |
| "script=boot.scr\0" \ |
| "image=zImage\0" \ |
| "console=ttyLP1\0" \ |
| "fdt_file=vf610-twr.dtb\0" \ |
| "boot_fdt=try\0" \ |
| "ip_dyn=yes\0" \ |
| "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ |
| "mmcpart=1\0" \ |
| "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ |
| "update_sd_firmware_filename=u-boot.imx\0" \ |
| "update_sd_firmware=" \ |
| "if test ${ip_dyn} = yes; then " \ |
| "setenv get_cmd dhcp; " \ |
| "else " \ |
| "setenv get_cmd tftp; " \ |
| "fi; " \ |
| "if mmc dev ${mmcdev}; then " \ |
| "if ${get_cmd} ${update_sd_firmware_filename}; then " \ |
| "setexpr fw_sz ${filesize} / 0x200; " \ |
| "setexpr fw_sz ${fw_sz} + 1; " \ |
| "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ |
| "fi; " \ |
| "fi\0" \ |
| "mmcargs=setenv bootargs console=${console},${baudrate} " \ |
| "root=${mmcroot}\0" \ |
| "loadbootscript=" \ |
| "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ |
| "bootscript=echo Running bootscript from mmc ...; " \ |
| "source\0" \ |
| "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
| "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
| "mmcboot=echo Booting from mmc ...; " \ |
| "run mmcargs; " \ |
| "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
| "if run loadfdt; then " \ |
| "bootz ${loadaddr} - ${fdt_addr}; " \ |
| "else " \ |
| "if test ${boot_fdt} = try; then " \ |
| "bootz; " \ |
| "else " \ |
| "echo WARN: Cannot load the DT; " \ |
| "fi; " \ |
| "fi; " \ |
| "else " \ |
| "bootz; " \ |
| "fi;\0" \ |
| "netargs=setenv bootargs console=${console},${baudrate} " \ |
| "root=/dev/nfs " \ |
| "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ |
| "netboot=echo Booting from net ...; " \ |
| "run netargs; " \ |
| "if test ${ip_dyn} = yes; then " \ |
| "setenv get_cmd dhcp; " \ |
| "else " \ |
| "setenv get_cmd tftp; " \ |
| "fi; " \ |
| "${get_cmd} ${image}; " \ |
| "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
| "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ |
| "bootz ${loadaddr} - ${fdt_addr}; " \ |
| "else " \ |
| "if test ${boot_fdt} = try; then " \ |
| "bootz; " \ |
| "else " \ |
| "echo WARN: Cannot load the DT; " \ |
| "fi; " \ |
| "fi; " \ |
| "else " \ |
| "bootz; " \ |
| "fi;\0" |
| |
| #define CONFIG_BOOTCOMMAND \ |
| "mmc dev ${mmcdev}; if mmc rescan; then " \ |
| "if run loadbootscript; then " \ |
| "run bootscript; " \ |
| "else " \ |
| "if run loadimage; then " \ |
| "run mmcboot; " \ |
| "else run netboot; " \ |
| "fi; " \ |
| "fi; " \ |
| "else run netboot; fi" |
| |
| /* Miscellaneous configurable options */ |
| #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| #undef CONFIG_AUTO_COMPLETE |
| |
| #define CONFIG_SYS_MEMTEST_START 0x80010000 |
| #define CONFIG_SYS_MEMTEST_END 0x87C00000 |
| |
| /* Physical memory map */ |
| #define CONFIG_NR_DRAM_BANKS 1 |
| #define PHYS_SDRAM (0x80000000) |
| #define PHYS_SDRAM_SIZE (128 * 1024 * 1024) |
| |
| #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| |
| #define CONFIG_SYS_INIT_SP_OFFSET \ |
| (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| #define CONFIG_SYS_INIT_SP_ADDR \ |
| (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| |
| #ifdef CONFIG_ENV_IS_IN_MMC |
| #define CONFIG_ENV_SIZE (8 * 1024) |
| |
| #define CONFIG_ENV_OFFSET (12 * 64 * 1024) |
| #define CONFIG_SYS_MMC_ENV_DEV 0 |
| #endif |
| |
| #ifdef CONFIG_ENV_IS_IN_NAND |
| #define CONFIG_ENV_SIZE (64 * 2048) |
| #define CONFIG_ENV_SECT_SIZE (64 * 2048) |
| #define CONFIG_ENV_RANGE (512 * 1024) |
| #define CONFIG_ENV_OFFSET 0x180000 |
| #endif |
| |
| #endif |