| /* SPDX-License-Identifier: GPL-2.0+ */ |
| /* |
| * Copyright (C) 2009 Samsung Electronics |
| * Minkyu Kang <mk7.kang@samsung.com> |
| * Kyungmin Park <kyungmin.park@samsung.com> |
| * |
| * Configuation settings for the SAMSUNG Universal (s5pc100) board. |
| */ |
| |
| #ifndef __CONFIG_H |
| #define __CONFIG_H |
| |
| #include <linux/sizes.h> |
| #include <asm/arch/cpu.h> /* get chip and board defs */ |
| |
| /* DRAM Base */ |
| #define CONFIG_SYS_SDRAM_BASE 0x30000000 |
| |
| /* Text Base */ |
| |
| /* MMC */ |
| #define SDHCI_MAX_HOSTS 4 |
| |
| /* USB Composite download gadget - g_dnl */ |
| #define DFU_DEFAULT_POLL_TIMEOUT 300 |
| |
| /* USB Samsung's IDs */ |
| |
| #define CONFIG_G_DNL_THOR_VENDOR_NUM 0x04E8 |
| #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D |
| #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 |
| #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 |
| |
| /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ |
| |
| /* partitions definitions */ |
| #define PARTS_CSA "csa-mmc" |
| #define PARTS_BOOTLOADER "u-boot" |
| #define PARTS_BOOT "boot" |
| #define PARTS_ROOT "platform" |
| #define PARTS_DATA "data" |
| #define PARTS_CSC "csc" |
| #define PARTS_UMS "ums" |
| |
| #define CONFIG_DFU_ALT \ |
| "u-boot raw 0x80 0x400;" \ |
| "uImage ext4 0 2;" \ |
| "exynos3-goni.dtb ext4 0 2;" \ |
| ""PARTS_ROOT" part 0 5\0" |
| |
| #define PARTS_DEFAULT \ |
| "uuid_disk=${uuid_gpt_disk};" \ |
| "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ |
| "name="PARTS_BOOTLOADER",size=60MiB," \ |
| "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \ |
| "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ |
| "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ |
| "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ |
| "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ |
| "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ |
| |
| #define COMMON_BOOT "${console} ${meminfo} ${mtdparts}" |
| |
| #define CONFIG_MISC_COMMON |
| |
| #define CONFIG_EXTRA_ENV_SETTINGS \ |
| "updateb=" \ |
| "onenand erase 0x0 0x100000;" \ |
| "onenand write 0x32008000 0x0 0x100000\0" \ |
| "updatek=" \ |
| "onenand erase 0xc00000 0x600000;" \ |
| "onenand write 0x31008000 0xc00000 0x600000\0" \ |
| "updateu=" \ |
| "onenand erase 0x01560000 0x1eaa0000;" \ |
| "onenand write 0x32000000 0x1260000 0x8C0000\0" \ |
| "bootk=" \ |
| "run loaduimage;" \ |
| "bootm 0x30007FC0\0" \ |
| "flashboot=" \ |
| "set bootargs root=/dev/mtdblock${bootblock} " \ |
| "rootfstype=${rootfstype} ${opts} " \ |
| "${lcdinfo} " COMMON_BOOT "; run bootk\0" \ |
| "ubifsboot=" \ |
| "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ |
| "${opts} ${lcdinfo} " \ |
| COMMON_BOOT "; run bootk\0" \ |
| "tftpboot=" \ |
| "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ |
| "${opts} ${lcdinfo} " COMMON_BOOT \ |
| "; tftp 0x30007FC0 uImage; bootm 0x30007FC0\0" \ |
| "ramboot=" \ |
| "set bootargs root=/dev/ram0 rw rootfstype=ext4" \ |
| " ${console} ${meminfo} " \ |
| "initrd=0x33000000,8M ramdisk=8192\0" \ |
| "mmcboot=" \ |
| "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ |
| "rootfstype=${rootfstype} ${opts} ${lcdinfo} " \ |
| COMMON_BOOT "; run bootk\0" \ |
| "boottrace=setenv opts initcall_debug; run bootcmd\0" \ |
| "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ |
| "verify=n\0" \ |
| "rootfstype=ext4\0" \ |
| "console=console=ttySAC2,115200n8\0" \ |
| "meminfo=mem=80M mem=256M@0x40000000 mem=128M@0x50000000\0" \ |
| "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0" \ |
| "mmcdev=0\0" \ |
| "mmcbootpart=2\0" \ |
| "mmcrootpart=5\0" \ |
| "partitions=" PARTS_DEFAULT \ |
| "bootblock=9\0" \ |
| "ubiblock=8\0" \ |
| "ubi=enabled\0" \ |
| "opts=always_resume=1\0" \ |
| "dfu_alt_info=" CONFIG_DFU_ALT "\0" |
| |
| /* Goni has 3 banks of DRAM, but swap the bank */ |
| #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */ |
| #define PHYS_SDRAM_1_SIZE (80 << 20) /* 80 MB in Bank #0 */ |
| #define PHYS_SDRAM_2 0x40000000 /* mDDR DMC1 Bank #1 */ |
| #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in Bank #1 */ |
| #define PHYS_SDRAM_3 0x50000000 /* mDDR DMC2 Bank #2 */ |
| #define PHYS_SDRAM_3_SIZE (128 << 20) /* 128 MB in Bank #2 */ |
| |
| /* FLASH and environment organization */ |
| #define CONFIG_MMC_DEFAULT_DEV 0 |
| |
| #define CONFIG_SYS_ONENAND_BASE 0xB0000000 |
| |
| #endif /* __CONFIG_H */ |