| // SPDX-License-Identifier: GPL-2.0-only |
| /* |
| * Copyright (C) 2015 Toby Churchill - http://www.toby-churchill.com/ |
| */ |
| /dts-v1/; |
| |
| #include "am33xx.dtsi" |
| |
| / { |
| model = "Toby Churchill SL50 Series"; |
| compatible = "tcl,am335x-sl50", "ti,am33xx"; |
| |
| cpus { |
| cpu@0 { |
| cpu0-supply = <&dcdc2_reg>; |
| }; |
| }; |
| |
| memory@80000000 { |
| device_type = "memory"; |
| reg = <0x80000000 0x20000000>; /* 512 MB */ |
| }; |
| |
| chosen { |
| stdout-path = &uart0; |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&led_pins>; |
| |
| led0 { |
| label = "sl50:green:usr0"; |
| gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; |
| default-state = "off"; |
| }; |
| |
| led1 { |
| label = "sl50:red:usr1"; |
| gpios = <&gpio1 22 GPIO_ACTIVE_LOW>; |
| default-state = "off"; |
| }; |
| |
| led2 { |
| label = "sl50:green:usr2"; |
| gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; |
| default-state = "off"; |
| }; |
| |
| led3 { |
| label = "sl50:red:usr3"; |
| gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; |
| default-state = "off"; |
| }; |
| }; |
| |
| backlight0: disp0 { |
| compatible = "pwm-backlight"; |
| pwms = <&ehrpwm1 0 500000 0>; |
| brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>; |
| default-brightness-level = <6>; |
| }; |
| |
| backlight1: disp1 { |
| compatible = "pwm-backlight"; |
| pwms = <&ehrpwm1 1 500000 0>; |
| brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>; |
| default-brightness-level = <6>; |
| }; |
| |
| clocks { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| /* audio external oscillator */ |
| tlv320aic3x_mclk: oscillator@0 { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <24576000>; /* 24.576MHz */ |
| }; |
| }; |
| |
| sound { |
| compatible = "ti,da830-evm-audio"; |
| ti,model = "AM335x-SL50"; |
| ti,audio-codec = <&audio_codec>; |
| ti,mcasp-controller = <&mcasp0>; |
| |
| clocks = <&tlv320aic3x_mclk>; |
| clock-names = "mclk"; |
| |
| ti,audio-routing = |
| "Headphone Jack", "HPLOUT", |
| "Headphone Jack", "HPROUT", |
| "LINE1R", "Line In", |
| "LINE1L", "Line In"; |
| }; |
| |
| emmc_pwrseq: pwrseq@0 { |
| compatible = "mmc-pwrseq-emmc"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&emmc_pwrseq_pins>; |
| reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; |
| }; |
| |
| vmmcsd_fixed: fixedregulator0 { |
| compatible = "regulator-fixed"; |
| regulator-name = "vmmcsd_fixed"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| }; |
| |
| &am33xx_pinmux { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&lwb_pins>; |
| |
| led_pins: pinmux_led_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* gpmc_a5.gpio1_21 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* gpmc_a6.gpio1_22 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* gpmc_a7.gpio1_23 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* gpmc_a8.gpio1_24 */ |
| >; |
| }; |
| |
| uart0_pins: pinmux_uart0_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| >; |
| }; |
| |
| uart1_pins: pinmux_uart1_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| >; |
| }; |
| |
| uart4_pins: pinmux_uart4_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* gpmc_wait0.uart4_rxd */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* gpmc_wpn.uart4_txd */ |
| >; |
| }; |
| |
| i2c0_pins: pinmux_i2c0_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) |
| >; |
| }; |
| |
| i2c2_pins: pinmux_i2c2_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */ |
| AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */ |
| >; |
| }; |
| |
| cpsw_default: cpsw_default { |
| pinctrl-single,pins = < |
| /* Slave 1 */ |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE0) |
| >; |
| }; |
| |
| cpsw_sleep: cpsw_sleep { |
| pinctrl-single,pins = < |
| /* Slave 1 reset value */ |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| >; |
| }; |
| |
| davinci_mdio_default: davinci_mdio_default { |
| pinctrl-single,pins = < |
| /* MDIO */ |
| AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) |
| >; |
| }; |
| |
| davinci_mdio_sleep: davinci_mdio_sleep { |
| pinctrl-single,pins = < |
| /* MDIO reset value */ |
| AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| >; |
| }; |
| |
| mmc1_pins: pinmux_mmc1_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE7) /* uart0_rtsn.gpio1_9 */ |
| >; |
| }; |
| |
| emmc_pwrseq_pins: pinmux_emmc_pwrseq_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a4.gpio1_20 */ |
| >; |
| }; |
| |
| emmc_pins: pinmux_emmc_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ |
| >; |
| }; |
| |
| audio_pins: pinmux_audio_pins { |
| pinctrl-single,pins = < |
| AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */ |
| AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */ |
| AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */ |
| AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */ |
| AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2 */ |
| >; |
| }; |
| |
| ehrpwm1_pins: pinmux_ehrpwm1a_pins { |
| pinctrl-single,pins = < |
| AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE6) /* gpmc_a2.ehrpwm1a */ |
| AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6) /* gpmc_a3.ehrpwm1b */ |
| >; |
| }; |
| |
| spi0_pins: pinmux_spi0_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_MOSI */ |
| AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_MISO */ |
| AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_CS0 (NBATTSS) */ |
| AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE0) /* SPI0_CS1 (FPGA_FLASH_NCS) */ |
| >; |
| }; |
| |
| lwb_pins: pinmux_lwb_pins { |
| pinctrl-single,pins = < |
| AM33XX_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7) /* SoundPA_en - mcasp0_fsr.gpio3_19 */ |
| AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) /* nKbdOnC - gpmc_ad10.gpio0_26 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE7) /* nKbdInt - gpmc_ad12.gpio1_12 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE7) /* nKbdReset - gpmc_ad13.gpio1_13 */ |
| AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE7) /* nDispReset - gpmc_ad14.gpio1_14 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLUP, MUX_MODE7) /* USB1_enPower - gpmc_a1.gpio1_17 */ |
| /* PDI Bus - Battery system */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLUP, MUX_MODE7) /* nBattReset gpmc_a0.gpio1_16 */ |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE7) /* BattPDIData gpmc_ad15.gpio1_15 */ |
| >; |
| }; |
| }; |
| |
| &i2c0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c0_pins>; |
| |
| clock-frequency = <400000>; |
| |
| tps: tps@24 { |
| reg = <0x24>; |
| }; |
| |
| bq32000: rtc@68 { |
| compatible = "ti,bq32000"; |
| trickle-resistor-ohms = <1120>; |
| reg = <0x68>; |
| }; |
| |
| eeprom: eeprom@50 { |
| compatible = "atmel,24c256"; |
| reg = <0x50>; |
| }; |
| |
| gpio_exp: mcp23017@20 { |
| compatible = "microchip,mcp23017"; |
| reg = <0x20>; |
| }; |
| |
| }; |
| |
| &i2c2 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c2_pins>; |
| |
| clock-frequency = <400000>; |
| |
| audio_codec: tlv320aic3106@1b { |
| status = "okay"; |
| compatible = "ti,tlv320aic3106"; |
| reg = <0x1b>; |
| |
| AVDD-supply = <&ldo4_reg>; |
| IOVDD-supply = <&ldo4_reg>; |
| DRVDD-supply = <&ldo4_reg>; |
| DVDD-supply = <&ldo3_reg>; |
| }; |
| |
| /* Ambient Light Sensor */ |
| als: isl29023@44 { |
| compatible = "isil,isl29023"; |
| reg = <0x44>; |
| }; |
| }; |
| |
| &rtc { |
| status = "disabled"; |
| }; |
| |
| &usb { |
| status = "okay"; |
| }; |
| |
| &usb_ctrl_mod { |
| status = "okay"; |
| }; |
| |
| &usb0_phy { |
| status = "okay"; |
| }; |
| |
| &usb1_phy { |
| status = "okay"; |
| }; |
| |
| &usb0 { |
| status = "okay"; |
| dr_mode = "peripheral"; |
| }; |
| |
| &usb1 { |
| status = "okay"; |
| dr_mode = "host"; |
| }; |
| |
| &cppi41dma { |
| status = "okay"; |
| }; |
| |
| &mmc1 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mmc1_pins>; |
| bus-width = <4>; |
| cd-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; |
| vmmc-supply = <&vmmcsd_fixed>; |
| }; |
| |
| &mmc2 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&emmc_pins>; |
| bus-width = <8>; |
| vmmc-supply = <&vmmcsd_fixed>; |
| mmc-pwrseq = <&emmc_pwrseq>; |
| }; |
| |
| &mcasp0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&audio_pins>; |
| |
| op-mode = <0>; /* MCASP_ISS_MODE */ |
| tdm-slots = <2>; |
| serial-dir = < |
| 2 0 1 0 |
| 0 0 0 0 |
| 0 0 0 0 |
| 0 0 0 0 |
| >; |
| tx-num-evt = <1>; |
| rx-num-evt = <1>; |
| }; |
| |
| &uart0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart0_pins>; |
| }; |
| |
| &uart1 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart1_pins>; |
| }; |
| |
| &uart4 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart4_pins>; |
| }; |
| |
| &spi0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&spi0_pins>; |
| |
| flash: n25q032@1 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "micron,n25q032"; |
| reg = <1>; |
| spi-max-frequency = <5000000>; |
| }; |
| }; |
| |
| #include "tps65217.dtsi" |
| |
| &tps { |
| ti,pmic-shutdown-controller; |
| |
| interrupt-parent = <&intc>; |
| interrupts = <7>; /* NNMI */ |
| |
| regulators { |
| dcdc1_reg: regulator@0 { |
| /* VDDS_DDR */ |
| regulator-min-microvolt = <1500000>; |
| regulator-max-microvolt = <1500000>; |
| regulator-always-on; |
| }; |
| |
| dcdc2_reg: regulator@1 { |
| /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ |
| regulator-name = "vdd_mpu"; |
| regulator-min-microvolt = <925000>; |
| regulator-max-microvolt = <1325000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| dcdc3_reg: regulator@2 { |
| /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ |
| regulator-name = "vdd_core"; |
| regulator-min-microvolt = <925000>; |
| regulator-max-microvolt = <1150000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| ldo1_reg: regulator@3 { |
| /* VRTC / VIO / VDDS*/ |
| regulator-always-on; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| ldo2_reg: regulator@4 { |
| /* VDD_3V3AUX */ |
| regulator-always-on; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| ldo3_reg: regulator@5 { |
| /* VDD_1V8 */ |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| }; |
| |
| ldo4_reg: regulator@6 { |
| /* VDD_3V3A */ |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| |
| &cpsw_emac0 { |
| phy-mode = "mii"; |
| phy-handle = <ðphy0>; |
| }; |
| |
| &mac { |
| status = "okay"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&cpsw_default>; |
| pinctrl-1 = <&cpsw_sleep>; |
| }; |
| |
| &davinci_mdio { |
| status = "okay"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&davinci_mdio_default>; |
| pinctrl-1 = <&davinci_mdio_sleep>; |
| reset-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; |
| reset-delay-us = <100>; /* PHY datasheet states 100us min */ |
| |
| ethphy0: ethernet-phy@0 { |
| reg = <0>; |
| }; |
| }; |
| |
| &sham { |
| status = "okay"; |
| }; |
| |
| &aes { |
| status = "okay"; |
| }; |
| |
| &epwmss1 { |
| status = "okay"; |
| }; |
| |
| &ehrpwm1 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&ehrpwm1_pins>; |
| }; |