| commit | 7ace50701f77c33eceb426d44f99930a1456532d | [log] [tgz] |
|---|---|---|
| author | Timur Tabi <timur@freescale.com> | Thu Apr 14 15:37:06 2011 -0500 |
| committer | Kumar Gala <galak@kernel.crashing.org> | Thu Apr 28 22:09:23 2011 -0500 |
| tree | 10ebc71b9adaee748e9254e1ebe3338b2392ec21 | |
| parent | 4ae8047118de2317fd2cc825132a3387139d0157 [diff] |
powerpc/85xx: Extend SERDES9 erratum work-around to SGMII, SRIO, and AURORA Part of the SERDES9 erratum work-around is to set some bits in the SerDes TTLCR0 register for lanes configured as XAUI, SGMII, SRIO, or AURORA. The current code does this only for XAUI, so extend it to the other protocols. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>