tree 10ebc71b9adaee748e9254e1ebe3338b2392ec21
parent 4ae8047118de2317fd2cc825132a3387139d0157
author Timur Tabi <timur@freescale.com> 1302813426 -0500
committer Kumar Gala <galak@kernel.crashing.org> 1304046563 -0500

powerpc/85xx: Extend SERDES9 erratum work-around to SGMII, SRIO, and AURORA

Part of the SERDES9 erratum work-around is to set some bits in the SerDes
TTLCR0 register for lanes configured as XAUI, SGMII, SRIO, or AURORA.  The
current code does this only for XAUI, so extend it to the other protocols.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>