| // SPDX-License-Identifier: GPL-2.0 or MIT |
| /* |
| * Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com> |
| * Copyright (c) 2022, Linaro Limited. All rights reserved. |
| * |
| */ |
| |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| |
| / { |
| interrupt-parent = <&gic>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| aliases { |
| serial0 = &uart0; |
| serial1 = &uart1; |
| }; |
| |
| chosen { |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu: cpu@0 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a35"; |
| reg = <0>; |
| next-level-cache = <&L2_0>; |
| }; |
| }; |
| |
| memory@88200000 { |
| device_type = "memory"; |
| reg = <0x88200000 0x77e00000>; |
| }; |
| |
| nvmxip-qspi@08000000 { |
| compatible = "nvmxip,qspi"; |
| reg = <0x08000000 0x2000000>; |
| lba_shift = <9>; |
| lba = <65536>; |
| }; |
| |
| gic: interrupt-controller@1c000000 { |
| compatible = "arm,gic-400"; |
| #interrupt-cells = <3>; |
| #address-cells = <0>; |
| interrupt-controller; |
| reg = <0x1c010000 0x1000>, |
| <0x1c02f000 0x2000>, |
| <0x1c04f000 0x1000>, |
| <0x1c06f000 0x2000>; |
| interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | |
| IRQ_TYPE_LEVEL_LOW)>; |
| }; |
| |
| L2_0: l2-cache0 { |
| compatible = "cache"; |
| cache-level = <2>; |
| cache-size = <0x80000>; |
| cache-line-size = <64>; |
| cache-sets = <1024>; |
| }; |
| |
| refclk100mhz: refclk100mhz { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <100000000>; |
| clock-output-names = "apb_pclk"; |
| }; |
| |
| smbclk: refclk24mhzx2 { |
| /* Reference 24MHz clock x 2 */ |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <48000000>; |
| clock-output-names = "smclk"; |
| }; |
| |
| timer { |
| compatible = "arm,armv8-timer"; |
| interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | |
| IRQ_TYPE_LEVEL_LOW)>, |
| <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | |
| IRQ_TYPE_LEVEL_LOW)>, |
| <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | |
| IRQ_TYPE_LEVEL_LOW)>, |
| <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | |
| IRQ_TYPE_LEVEL_LOW)>; |
| }; |
| |
| uartclk: uartclk { |
| /* UART clock - 50MHz */ |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <50000000>; |
| clock-output-names = "uartclk"; |
| }; |
| |
| psci { |
| compatible = "arm,psci-1.0", "arm,psci-0.2"; |
| method = "smc"; |
| }; |
| |
| soc { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| interrupt-parent = <&gic>; |
| ranges; |
| |
| timer@1a220000 { |
| compatible = "arm,armv7-timer-mem"; |
| reg = <0x1a220000 0x1000>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| clock-frequency = <50000000>; |
| ranges; |
| |
| frame@1a230000 { |
| frame-number = <0>; |
| interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; |
| reg = <0x1a230000 0x1000>; |
| }; |
| }; |
| |
| uart0: serial@1a510000 { |
| compatible = "arm,pl011", "arm,primecell"; |
| reg = <0x1a510000 0x1000>; |
| interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&uartclk>, <&refclk100mhz>; |
| clock-names = "uartclk", "apb_pclk"; |
| }; |
| |
| uart1: serial@1a520000 { |
| compatible = "arm,pl011", "arm,primecell"; |
| reg = <0x1a520000 0x1000>; |
| interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&uartclk>, <&refclk100mhz>; |
| clock-names = "uartclk", "apb_pclk"; |
| }; |
| |
| mhu_hse1: mailbox@1b820000 { |
| compatible = "arm,mhuv2-tx", "arm,primecell"; |
| reg = <0x1b820000 0x1000>; |
| clocks = <&refclk100mhz>; |
| clock-names = "apb_pclk"; |
| interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; |
| #mbox-cells = <2>; |
| arm,mhuv2-protocols = <0 0>; |
| secure-status = "okay"; /* secure-world-only */ |
| status = "disabled"; |
| }; |
| |
| mhu_seh1: mailbox@1b830000 { |
| compatible = "arm,mhuv2-rx", "arm,primecell"; |
| reg = <0x1b830000 0x1000>; |
| clocks = <&refclk100mhz>; |
| clock-names = "apb_pclk"; |
| interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; |
| #mbox-cells = <2>; |
| arm,mhuv2-protocols = <0 0>; |
| secure-status = "okay"; /* secure-world-only */ |
| status = "disabled"; |
| }; |
| }; |
| }; |