| // SPDX-License-Identifier: GPL-2.0+ |
| * Copyright 2012 Freescale Semiconductor, Inc. |
| #define MXS_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin) |
| #define PINID(bank, pin) ((bank) * 32 + (pin)) |
| * pinmux-id bit field definitions |
| #define MUXID_TO_PINID(m) PINID((m) >> 12 & 0xf, (m) >> 4 & 0xff) |
| #define MUXID_TO_MUXSEL(m) ((m) & 0xf) |
| #define PINID_TO_BANK(p) ((p) >> 5) |
| #define PINID_TO_PIN(p) ((p) % 32) |
| * pin config bit field definitions |
| * MSB of each field is presence bit for the config. |
| #define PULL_PRESENT (1 << 6) |
| #define VOL_PRESENT (1 << 4) |
| #define MA_PRESENT (1 << 2) |
| #define CFG_TO_PULL(c) ((c) >> PULL_SHIFT & 0x1) |
| #define CFG_TO_VOL(c) ((c) >> VOL_SHIFT & 0x1) |
| #define CFG_TO_MA(c) ((c) >> MA_SHIFT & 0x3) |
| static inline void mxs_pinctrl_rmwl(u32 value, u32 mask, u8 shift, |
| clrsetbits_le32(reg, mask << shift, value << shift); |
| #endif /* __PINCTRL_MXS_H */ |