commit | 7862a2aeb57e08d23401c251216e39e1cbf19ce6 | [log] [tgz] |
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author | Leo Yu-Chi Liang <ycliang@andestech.com> | Tue Dec 26 14:17:35 2023 +0800 |
committer | Leo Yu-Chi Liang <ycliang@andestech.com> | Wed Dec 27 17:29:07 2023 +0800 |
tree | 37710debed41f1ad9386610ea67c4a199bb4b5ce | |
parent | 96e75a89ba62f151f953c90401e4872aff46e484 [diff] |
andes: cpu: Enable cache and TLB ECC support Andes CPU supports cache and TLB ECC. Enable them by default. Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>