arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts

/*
 * Copyright (C) 2014-2015 Altera Corporation <www.altera.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

/dts-v1/;
#include "socfpga_arria10_socdk.dtsi"

/ {
	chosen {
		firmware-loader = <&fs_loader0>;
	};

	fs_loader0: fs-loader {
		u-boot,dm-pre-reloc;
		compatible = "u-boot,fs-loader";
		phandlepart = <&mmc 1>;
	};
};

&fpga_mgr {
	u-boot,dm-pre-reloc;
	altr,bitstream = "fit_spl_fpga.itb";
};

&mmc {
	u-boot,dm-pre-reloc;
	status = "okay";
	num-slots = <1>;
	cap-sd-highspeed;
	broken-cd;
	bus-width = <4>;
};

&eccmgr {
	sdmmca-ecc@ff8c2c00 {
		compatible = "altr,socfpga-sdmmc-ecc";
		reg = <0xff8c2c00 0x400>;
		altr,ecc-parent = <&mmc>;
		interrupts = <15 IRQ_TYPE_LEVEL_HIGH>,
			     <47 IRQ_TYPE_LEVEL_HIGH>,
			     <16 IRQ_TYPE_LEVEL_HIGH>,
			     <48 IRQ_TYPE_LEVEL_HIGH>;
	};
};

/* Clock available early */
&main_sdmmc_clk {
	u-boot,dm-pre-reloc;
};

&peri_sdmmc_clk {
	u-boot,dm-pre-reloc;
};

&sdmmc_free_clk {
	u-boot,dm-pre-reloc;
};

&sdmmc_clk {
	u-boot,dm-pre-reloc;
};