| // SPDX-License-Identifier: GPL-2.0+ |
| * dts file for Xilinx ZynqMP ZCU102 RevB |
| * (C) Copyright 2016 - 2020, Xilinx, Inc. |
| * Michal Simek <michal.simek@xilinx.com> |
| #include "zynqmp-zcu102-revA.dts" |
| model = "ZynqMP ZCU102 RevB"; |
| compatible = "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; |
| ti,rx-internal-delay = <0x8>; |
| ti,tx-internal-delay = <0xa>; |
| ti,dp83867-rxctrl-strap-quirk; |
| /* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */ |
| /delete-node/ ethernet-phy@21; |
| /* Fix collision with u61 */ |
| compatible = "maxim,max15303"; |
| /delete-node/ max15303@20; |