Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
70ab943fd6bc94539e3ce280e6ee9fffade9858e
/
.
/
board
/
xilinx
/
versal
/
Makefile
blob: e9307d7fa6909a32b3675f171fc0cb1ea386552f [
file
] [
log
] [
blame
]
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2016 - 2018 Xilinx, Inc.
# Michal Simek <michal.simek@xilinx.com>
#
obj
-
y
:=
board
.
o
obj
-
y
+=
../
common
/
board
.
o