arch/xtensa/cpu/Makefile - filogic/uboot - Gitiles

 #
 # (C) Copyright 2007 - 2013 Tensilica, Inc.
 # (C) Copyright 2014 - 2016 Cadence Design Systems Inc.
 #
 # SPDX-License-Identifier:	GPL-2.0+
 #

 obj-y = cpu.o exceptions.o
 extra-y = start.o
	#
	# (C) Copyright 2007 - 2013 Tensilica, Inc.
	# (C) Copyright 2014 - 2016 Cadence Design Systems Inc.
	#
	# SPDX-License-Identifier: GPL-2.0+
	#

	obj-y = cpu.o exceptions.o
	extra-y = start.o