| // SPDX-License-Identifier: GPL-2.0-only OR MIT |
| /* |
| * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ |
| * |
| * Base Board: https://www.ti.com/lit/zip/SPRR463 |
| */ |
| |
| /dts-v1/; |
| |
| #include "k3-am68-sk-som.dtsi" |
| #include <dt-bindings/net/ti-dp83867.h> |
| #include <dt-bindings/phy/phy-cadence.h> |
| #include <dt-bindings/phy/phy.h> |
| |
| #include "k3-serdes.h" |
| |
| / { |
| compatible = "ti,am68-sk", "ti,j721s2"; |
| model = "Texas Instruments AM68 SK"; |
| |
| chosen { |
| stdout-path = "serial2:115200n8"; |
| }; |
| |
| aliases { |
| serial0 = &wkup_uart0; |
| serial1 = &mcu_uart0; |
| serial2 = &main_uart8; |
| mmc1 = &main_sdhci1; |
| can0 = &mcu_mcan0; |
| can1 = &mcu_mcan1; |
| can2 = &main_mcan6; |
| can3 = &main_mcan7; |
| ethernet0 = &cpsw_port1; |
| }; |
| |
| vusb_main: regulator-vusb-main5v0 { |
| /* USB MAIN INPUT 5V DC */ |
| compatible = "regulator-fixed"; |
| regulator-name = "vusb-main5v0"; |
| regulator-min-microvolt = <5000000>; |
| regulator-max-microvolt = <5000000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| vsys_3v3: regulator-vsys3v3 { |
| /* Output of LM5141 */ |
| compatible = "regulator-fixed"; |
| regulator-name = "vsys_3v3"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| vin-supply = <&vusb_main>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| vdd_mmc1: regulator-sd { |
| /* Output of TPS22918 */ |
| compatible = "regulator-fixed"; |
| regulator-name = "vdd_mmc1"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| enable-active-high; |
| vin-supply = <&vsys_3v3>; |
| gpio = <&exp1 8 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| vdd_sd_dv: regulator-tlv71033 { |
| /* Output of TLV71033 */ |
| compatible = "regulator-gpio"; |
| regulator-name = "tlv71033"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&vdd_sd_dv_pins_default>; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| vin-supply = <&vsys_3v3>; |
| gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>; |
| states = <1800000 0x0>, |
| <3300000 0x1>; |
| }; |
| |
| vsys_io_1v8: regulator-vsys-io-1v8 { |
| compatible = "regulator-fixed"; |
| regulator-name = "vsys_io_1v8"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| vsys_io_1v2: regulator-vsys-io-1v2 { |
| compatible = "regulator-fixed"; |
| regulator-name = "vsys_io_1v2"; |
| regulator-min-microvolt = <1200000>; |
| regulator-max-microvolt = <1200000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| transceiver1: can-phy0 { |
| compatible = "ti,tcan1042"; |
| #phy-cells = <0>; |
| max-bitrate = <5000000>; |
| }; |
| |
| transceiver2: can-phy1 { |
| compatible = "ti,tcan1042"; |
| #phy-cells = <0>; |
| max-bitrate = <5000000>; |
| }; |
| |
| transceiver3: can-phy2 { |
| compatible = "ti,tcan1042"; |
| #phy-cells = <0>; |
| max-bitrate = <5000000>; |
| }; |
| |
| transceiver4: can-phy3 { |
| compatible = "ti,tcan1042"; |
| #phy-cells = <0>; |
| max-bitrate = <5000000>; |
| }; |
| |
| connector-hdmi { |
| compatible = "hdmi-connector"; |
| label = "hdmi"; |
| type = "a"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&hdmi_hpd_pins_default>; |
| ddc-i2c-bus = <&mcu_i2c1>; |
| /* HDMI_HPD */ |
| hpd-gpios = <&main_gpio0 0 GPIO_ACTIVE_HIGH>; |
| |
| port { |
| hdmi_connector_in: endpoint { |
| remote-endpoint = <&tfp410_out>; |
| }; |
| }; |
| }; |
| |
| bridge-dvi { |
| compatible = "ti,tfp410"; |
| /* HDMI_PDn */ |
| powerdown-gpios = <&exp2 0 GPIO_ACTIVE_LOW>; |
| ti,deskew = <0>; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| tfp410_in: endpoint { |
| remote-endpoint = <&dpi_out0>; |
| pclk-sample = <1>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <1>; |
| |
| tfp410_out: endpoint { |
| remote-endpoint = <&hdmi_connector_in>; |
| }; |
| }; |
| }; |
| }; |
| |
| csi_mux: mux-controller { |
| compatible = "gpio-mux"; |
| #mux-state-cells = <1>; |
| mux-gpios = <&exp3 1 GPIO_ACTIVE_HIGH>; |
| idle-state = <0>; |
| }; |
| }; |
| |
| &main_pmx0 { |
| main_uart8_pins_default: main-uart8-default-pins { |
| pinctrl-single,pins = < |
| J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */ |
| J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */ |
| >; |
| }; |
| |
| main_i2c0_pins_default: main-i2c0-default-pins { |
| pinctrl-single,pins = < |
| J721S2_IOPAD(0x0e0, PIN_INPUT, 0) /* (AH25) I2C0_SCL */ |
| J721S2_IOPAD(0x0e4, PIN_INPUT, 0) /* (AE24) I2C0_SDA */ |
| >; |
| }; |
| |
| main_i2c1_pins_default: main-i2c1-default-pins { |
| pinctrl-single,pins = < |
| J721S2_IOPAD(0x0ac, PIN_INPUT, 13) /* (AC25) MCASP0_AXR15.I2C1_SCL */ |
| J721S2_IOPAD(0x0b0, PIN_INPUT, 13) /* (AD26) MCASP1_AXR3.I2C1_SDA */ |
| >; |
| }; |
| |
| main_mmc1_pins_default: main-mmc1-default-pins { |
| pinctrl-single,pins = < |
| J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */ |
| J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */ |
| J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */ |
| J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */ |
| J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */ |
| J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */ |
| J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */ |
| >; |
| }; |
| |
| vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { |
| pinctrl-single,pins = < |
| J721S2_IOPAD(0x0c4, PIN_INPUT, 7) /* (AB26) ECAP0_IN_APWM_OUT.GPIO0_49 */ |
| >; |
| }; |
| |
| main_usbss0_pins_default: main-usbss0-default-pins { |
| pinctrl-single,pins = < |
| J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */ |
| >; |
| }; |
| |
| main_mcan6_pins_default: main-mcan6-default-pins { |
| pinctrl-single,pins = < |
| J721S2_IOPAD(0x098, PIN_INPUT, 0) /* (V25) MCASP0_AXR10.MCAN6_RX */ |
| J721S2_IOPAD(0x094, PIN_INPUT, 0) /* (AA25) MCASP0_AXR9.MCAN6_TX */ |
| >; |
| }; |
| |
| main_mcan7_pins_default: main-mcan7-default-pins { |
| pinctrl-single,pins = < |
| J721S2_IOPAD(0x0a0, PIN_INPUT, 0) /* (AB25) MCASP0_AXR12.MCAN7_RX */ |
| J721S2_IOPAD(0x09c, PIN_INPUT, 0) /* (T24) MCASP0_AXR11.MCAN7_TX */ |
| >; |
| }; |
| |
| main_i2c4_pins_default: main-i2c4-default-pins { |
| pinctrl-single,pins = < |
| J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AF28) MCAN13_RX.I2C4_SDA */ |
| J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AD25) MCAN14_TX.I2C4_SCL */ |
| >; |
| }; |
| |
| rpi_header_gpio0_pins_default: rpi-header-gpio0-default-pins { |
| pinctrl-single,pins = < |
| J721S2_IOPAD(0x0a8, PIN_INPUT, 7) /* (U24) MCASP0_AXR14.GPIO0_42 */ |
| J721S2_IOPAD(0x090, PIN_INPUT, 7) /* (W24) MCASP0_AXR8.GPIO0_36 */ |
| J721S2_IOPAD(0x0bc, PIN_INPUT, 7) /* (V28) MCASP1_AFSX.GPIO0_47 */ |
| J721S2_IOPAD(0x06c, PIN_INPUT, 7) /* (V26) MCAN1_TX.GPIO0_27 */ |
| J721S2_IOPAD(0x004, PIN_INPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */ |
| J721S2_IOPAD(0x008, PIN_INPUT, 7) /* (AC24) MCAN12_RX.GPIO0_2 */ |
| J721S2_IOPAD(0x0b8, PIN_INPUT, 7) /* (AA24) MCASP1_ACLKX.GPIO0_46 */ |
| J721S2_IOPAD(0x00c, PIN_INPUT, 7) /* (AE28) MCAN13_TX.GPIO0_3 */ |
| J721S2_IOPAD(0x034, PIN_INPUT, 7) /* (AD24) PMIC_WAKE0.GPIO0_13 */ |
| J721S2_IOPAD(0x0a4, PIN_INPUT, 7) /* (T23) MCASP0_AXR13.GPIO0_41 */ |
| J721S2_IOPAD(0x0c0, PIN_INPUT, 7) /* (T28) MCASP1_AXR0.GPIO0_48 */ |
| J721S2_IOPAD(0x0b4, PIN_INPUT, 7) /* (U25) MCASP1_AXR4.GPIO0_45 */ |
| J721S2_IOPAD(0x0cc, PIN_INPUT, 7) /* (AE27) SPI0_CS0.GPIO0_51 */ |
| J721S2_IOPAD(0x08c, PIN_INPUT, 7) /* (T25) MCASP0_AXR7.GPIO0_35 */ |
| >; |
| }; |
| |
| dss_vout0_pins_default: dss-vout0-default-pins { |
| pinctrl-single,pins = < |
| J721S2_IOPAD(0x074, PIN_OUTPUT, 2) /* (R28) MCAN2_TX.VOUT0_DATA0 */ |
| J721S2_IOPAD(0x070, PIN_OUTPUT, 2) /* (R27) MCAN1_RX.VOUT0_DATA1 */ |
| J721S2_IOPAD(0x04c, PIN_OUTPUT, 2) /* (V27) MCASP1_AXR1.VOUT0_DATA10 */ |
| J721S2_IOPAD(0x048, PIN_OUTPUT, 2) /* (AB27) MCASP0_AXR2.VOUT0_DATA11 */ |
| J721S2_IOPAD(0x044, PIN_OUTPUT, 2) /* (Y26) MCASP0_AXR1.VOUT0_DATA12 */ |
| J721S2_IOPAD(0x040, PIN_OUTPUT, 2) /* (AC28) MCASP0_AXR0.VOUT0_DATA13 */ |
| J721S2_IOPAD(0x03c, PIN_OUTPUT, 2) /* (U27) MCASP0_AFSX.VOUT0_DATA14 */ |
| J721S2_IOPAD(0x038, PIN_OUTPUT, 2) /* (AB28) MCASP0_ACLKX.VOUT0_DATA15 */ |
| J721S2_IOPAD(0x0c8, PIN_OUTPUT, 2) /* (AD28) EXT_REFCLK1.VOUT0_DATA16 */ |
| J721S2_IOPAD(0x030, PIN_OUTPUT, 2) /* (T26) GPIO0_12.VOUT0_DATA17 */ |
| J721S2_IOPAD(0x02c, PIN_OUTPUT, 2) /* (V23) GPIO0_11.VOUT0_DATA18 */ |
| J721S2_IOPAD(0x028, PIN_OUTPUT, 2) /* (AB24) MCAN16_RX.VOUT0_DATA19 */ |
| J721S2_IOPAD(0x07c, PIN_OUTPUT, 2) /* (T27) MCASP0_AXR3.VOUT0_DATA2 */ |
| J721S2_IOPAD(0x024, PIN_OUTPUT, 2) /* (Y28) MCAN16_TX.VOUT0_DATA20 */ |
| J721S2_IOPAD(0x020, PIN_OUTPUT, 2) /* (AA23) MCAN15_RX.VOUT0_DATA21 */ |
| J721S2_IOPAD(0x01c, PIN_OUTPUT, 2) /* (Y24) MCAN15_TX.VOUT0_DATA22 */ |
| J721S2_IOPAD(0x018, PIN_OUTPUT, 2) /* (W23) MCAN14_RX.VOUT0_DATA23 */ |
| J721S2_IOPAD(0x068, PIN_OUTPUT, 2) /* (U28) MCAN0_RX.VOUT0_DATA3 */ |
| J721S2_IOPAD(0x064, PIN_OUTPUT, 2) /* (W28) MCAN0_TX.VOUT0_DATA4 */ |
| J721S2_IOPAD(0x060, PIN_OUTPUT, 2) /* (AC27) MCASP2_AXR1.VOUT0_DATA5 */ |
| J721S2_IOPAD(0x05c, PIN_OUTPUT, 2) /* (AA26) MCASP2_AXR0.VOUT0_DATA6 */ |
| J721S2_IOPAD(0x058, PIN_OUTPUT, 2) /* (AA27) MCASP2_AFSX.VOUT0_DATA7 */ |
| J721S2_IOPAD(0x054, PIN_OUTPUT, 2) /* (Y27) MCASP2_ACLKX.VOUT0_DATA8 */ |
| J721S2_IOPAD(0x050, PIN_OUTPUT, 2) /* (W27) MCASP1_AXR2.VOUT0_DATA9 */ |
| J721S2_IOPAD(0x084, PIN_OUTPUT, 2) /* (AA28) MCASP0_AXR5.VOUT0_DE */ |
| J721S2_IOPAD(0x080, PIN_OUTPUT, 2) /* (U26) MCASP0_AXR4.VOUT0_HSYNC */ |
| J721S2_IOPAD(0x078, PIN_OUTPUT, 2) /* (Y25) MCAN2_RX.VOUT0_PCLK */ |
| J721S2_IOPAD(0x088, PIN_OUTPUT, 2) /* (AD27) MCASP0_AXR6.VOUT0_VP0_VSYNC */ |
| >; |
| }; |
| |
| hdmi_hpd_pins_default: hdmi-hpd-default-pins { |
| pinctrl-single,pins = < |
| J721S2_IOPAD(0x000, PIN_INPUT, 7) /* (AG24) EXTINTN.GPIO0_0 */ |
| >; |
| }; |
| }; |
| |
| &wkup_pmx2 { |
| wkup_uart0_pins_default: wkup-uart0-default-pins { |
| pinctrl-single,pins = < |
| J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (E25) WKUP_GPIO0_6.WKUP_UART0_CTSn */ |
| J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (F28) WKUP_GPIO0_7.WKUP_UART0_RTSn */ |
| J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */ |
| J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */ |
| >; |
| }; |
| |
| mcu_cpsw_pins_default: mcu-cpsw-default-pins { |
| pinctrl-single,pins = < |
| J721S2_WKUP_IOPAD(0x02C, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */ |
| J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */ |
| J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */ |
| J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */ |
| J721S2_WKUP_IOPAD(0x01C, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */ |
| J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */ |
| J721S2_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */ |
| J721S2_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */ |
| J721S2_WKUP_IOPAD(0x00C, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */ |
| J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */ |
| J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */ |
| J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */ |
| >; |
| }; |
| |
| mcu_mdio_pins_default: mcu-mdio-default-pins { |
| pinctrl-single,pins = < |
| J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */ |
| J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */ |
| >; |
| }; |
| |
| mcu_mcan0_pins_default: mcu-mcan0-default-pins { |
| pinctrl-single,pins = < |
| J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */ |
| J721S2_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */ |
| >; |
| }; |
| |
| mcu_mcan1_pins_default: mcu-mcan1-default-pins { |
| pinctrl-single,pins = < |
| J721S2_WKUP_IOPAD(0x06C, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */ |
| J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (C23) WKUP_GPIO0_4.MCU_MCAN1_TX*/ |
| >; |
| }; |
| |
| mcu_i2c0_pins_default: mcu-i2c0-default-pins { |
| pinctrl-single,pins = < |
| J721S2_WKUP_IOPAD(0x0a0, PIN_INPUT, 0) /* (G24) MCU_I2C0_SCL */ |
| J721S2_WKUP_IOPAD(0x0a4, PIN_INPUT, 0) /* (J25) MCU_I2C0_SDA */ |
| >; |
| }; |
| |
| mcu_i2c1_pins_default: mcu-i2c1-default-pins { |
| pinctrl-single,pins = < |
| J721S2_WKUP_IOPAD(0x078, PIN_INPUT, 0) /* (F24) WKUP_GPIO0_8.MCU_I2C1_SCL */ |
| J721S2_WKUP_IOPAD(0x07c, PIN_INPUT, 0) /* (H26) WKUP_GPIO0_9.MCU_I2C1_SDA */ |
| >; |
| }; |
| |
| mcu_uart0_pins_default: mcu-uart0-default-pins { |
| pinctrl-single,pins = < |
| J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */ |
| J721S2_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */ |
| >; |
| }; |
| |
| mcu_rpi_header_gpio0_pins0_default: mcu-rpi-header-gpio0-default-pins-0 { |
| pinctrl-single,pins = < |
| J721S2_WKUP_IOPAD(0x118, PIN_INPUT, 7) /* (G25) WKUP_GPIO0_66 */ |
| J721S2_WKUP_IOPAD(0x05C, PIN_INPUT, 7) /* (E24) MCU_SPI1_D0.WKUP_GPIO0_1 */ |
| J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C28) MCU_SPI1_D1.WKUP_GPIO0_2 */ |
| J721S2_WKUP_IOPAD(0x058, PIN_INPUT, 7) /* (D26) MCU_SPI1_CLK.WKUP_GPIO0_0 */ |
| J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 7) /* (D25) MCU_SPI1_CS2.WKUP_GPIO0_15*/ |
| J721S2_WKUP_IOPAD(0x0B8, PIN_INPUT, 7) /* (G27) WKUP_GPIO0_56 */ |
| J721S2_WKUP_IOPAD(0x114, PIN_INPUT, 7) /* (J26) WKUP_GPIO0_57 */ |
| J721S2_WKUP_IOPAD(0x11C, PIN_INPUT, 7) /* (J27) WKUP_GPIO0_67 */ |
| J721S2_WKUP_IOPAD(0x064, PIN_INPUT, 7) /* (C27) MCU_SPI1_CS0.WKUP_GPIO0_3 */ |
| >; |
| }; |
| }; |
| |
| &wkup_pmx3 { |
| mcu_rpi_header_gpio0_pins1_default: mcu-rpi-header-gpio0-default-pins-1 { |
| pinctrl-single,pins = < |
| J721S2_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (K26) WKUP_GPIO0_49 */ |
| >; |
| }; |
| }; |
| |
| &main_gpio0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&rpi_header_gpio0_pins_default>; |
| }; |
| |
| &wkup_gpio0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mcu_rpi_header_gpio0_pins0_default>, <&mcu_rpi_header_gpio0_pins1_default>; |
| }; |
| |
| &wkup_uart0 { |
| status = "reserved"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&wkup_uart0_pins_default>; |
| }; |
| |
| &wkup_i2c0 { |
| bootph-all; |
| clock-frequency = <400000>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&wkup_i2c0_pins_default>; |
| status = "okay"; |
| |
| lp8733: pmic@60 { |
| compatible = "ti,lp8733"; |
| reg = <0x60>; |
| buck0-in-supply = <&vsys_3v3>; |
| buck1-in-supply = <&vsys_3v3>; |
| ldo0-in-supply = <&vsys_3v3>; |
| ldo1-in-supply = <&vsys_3v3>; |
| |
| lp8733_regulators: regulators { |
| lp8733_buck0_reg: buck0 { |
| /* FB_B0 -> LP8733-BUCK1 - VDD_MCU_0V85 */ |
| regulator-name = "lp8733-buck0"; |
| regulator-min-microvolt = <850000>; |
| regulator-max-microvolt = <850000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| lp8733_buck1_reg: buck1 { |
| /* FB_B1 -> LP8733-BUCK2 - VDD_DDR_1V1 */ |
| regulator-name = "lp8733-buck1"; |
| regulator-min-microvolt = <1100000>; |
| regulator-max-microvolt = <1100000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| lp8733_ldo0_reg: ldo0 { |
| /* LDO0 -> LP8733-LDO1 - VDA_DLL_0V8 */ |
| regulator-name = "lp8733-ldo0"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <800000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| lp8733_ldo1_reg: ldo1 { |
| /* LDO1 -> LP8733-LDO2 - VDA_LN_1V8 */ |
| regulator-name = "lp8733-ldo1"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| }; |
| }; |
| |
| tps62873a: regulator@40 { |
| compatible = "ti,tps62873"; |
| reg = <0x40>; |
| bootph-pre-ram; |
| regulator-name = "VDD_CPU_AVS"; |
| regulator-min-microvolt = <600000>; |
| regulator-max-microvolt = <900000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| tps62873b: regulator@43 { |
| compatible = "ti,tps62873"; |
| reg = <0x43>; |
| regulator-name = "VDD_CORE_0V8"; |
| regulator-min-microvolt = <800000>; |
| regulator-max-microvolt = <800000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| }; |
| |
| &mcu_uart0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mcu_uart0_pins_default>; |
| }; |
| |
| &main_uart8 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_uart8_pins_default>; |
| /* Shared with TFA on this platform */ |
| power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>; |
| }; |
| |
| &main_i2c0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_i2c0_pins_default>; |
| clock-frequency = <400000>; |
| |
| exp1: gpio@21 { |
| compatible = "ti,tca6416"; |
| reg = <0x21>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| gpio-line-names = " ", " ", " ", " ", " ", |
| "BOARDID_EEPROM_WP", "CAN_STB", " ", |
| "GPIO_uSD_PWR_EN", " ", "IO_EXP_PCIe1_M.2_RTSz", |
| "IO_EXP_MCU_RGMII_RST#", " ", " ", " ", " "; |
| }; |
| }; |
| |
| &main_i2c1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_i2c1_pins_default>; |
| status = "okay"; |
| |
| exp3: gpio@20 { |
| compatible = "ti,tca6408"; |
| reg = <0x20>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| gpio-line-names = "CSI_VIO_SEL", "CSI_SEL_FPC_EXPn", |
| "IO_EXP_CSI2_EXP_RSTz","CSI0_B_GPIO1", |
| "CSI1_B_GPIO1"; |
| }; |
| |
| i2c-mux@70 { |
| compatible = "nxp,pca9543"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x70>; |
| |
| cam0_i2c: i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0>; |
| }; |
| |
| cam1_i2c: i2c@1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <1>; |
| }; |
| |
| }; |
| }; |
| |
| &main_i2c4 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_i2c4_pins_default>; |
| clock-frequency = <400000>; |
| }; |
| |
| &mcu_i2c0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mcu_i2c0_pins_default>; |
| clock-frequency = <400000>; |
| }; |
| |
| &mcu_i2c1 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mcu_i2c1_pins_default>; |
| /* i2c1 is used for DVI DDC, so we need to use 100kHz */ |
| clock-frequency = <100000>; |
| |
| exp2: gpio@20 { |
| compatible = "ti,tca6408"; |
| reg = <0x20>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| gpio-line-names = "HDMI_PDn","HDMI_LS_OE", |
| "DP0_3V3_EN","eDP_ENABLE"; |
| }; |
| }; |
| |
| &main_sdhci1 { |
| /* SD card */ |
| status = "okay"; |
| pinctrl-0 = <&main_mmc1_pins_default>; |
| pinctrl-names = "default"; |
| disable-wp; |
| vmmc-supply = <&vdd_mmc1>; |
| vqmmc-supply = <&vdd_sd_dv>; |
| }; |
| |
| &mcu_cpsw { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>; |
| }; |
| |
| &davinci_mdio { |
| phy0: ethernet-phy@0 { |
| reg = <0>; |
| ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; |
| ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; |
| ti,min-output-impedance; |
| }; |
| }; |
| |
| &cpsw_port1 { |
| phy-mode = "rgmii-rxid"; |
| phy-handle = <&phy0>; |
| }; |
| |
| &mcu_mcan0 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mcu_mcan0_pins_default>; |
| phys = <&transceiver1>; |
| }; |
| |
| &mcu_mcan1 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mcu_mcan1_pins_default>; |
| phys = <&transceiver2>; |
| }; |
| |
| &main_mcan6 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_mcan6_pins_default>; |
| phys = <&transceiver3>; |
| }; |
| |
| &main_mcan7 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_mcan7_pins_default>; |
| phys = <&transceiver4>; |
| }; |
| |
| &dss { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&dss_vout0_pins_default>; |
| /* |
| * These clock assignments are chosen to enable the following outputs: |
| * |
| * VP0 - DisplayPort SST |
| * VP1 - DPI0 |
| * VP2 - DSI |
| * VP3 - DPI1 |
| */ |
| assigned-clocks = <&k3_clks 158 2>, |
| <&k3_clks 158 5>, |
| <&k3_clks 158 14>, |
| <&k3_clks 158 18>; |
| assigned-clock-parents = <&k3_clks 158 3>, |
| <&k3_clks 158 7>, |
| <&k3_clks 158 16>, |
| <&k3_clks 158 22>; |
| }; |
| |
| &dss_ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| /* HDMI */ |
| port@1 { |
| reg = <1>; |
| |
| dpi_out0: endpoint { |
| remote-endpoint = <&tfp410_in>; |
| }; |
| }; |
| }; |
| |
| &serdes_ln_ctrl { |
| idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_PCIE1_LANE1>, |
| <J721S2_SERDES0_LANE2_USB_SWAP>, <J721S2_SERDES0_LANE3_USB>; |
| }; |
| |
| &serdes_refclk { |
| clock-frequency = <100000000>; |
| }; |
| |
| &serdes0 { |
| status = "okay"; |
| |
| serdes0_pcie_link: phy@0 { |
| reg = <0>; |
| cdns,num-lanes = <2>; |
| #phy-cells = <0>; |
| cdns,phy-type = <PHY_TYPE_PCIE>; |
| resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>; |
| }; |
| |
| serdes0_usb_link: phy@2 { |
| status = "okay"; |
| reg = <2>; |
| cdns,num-lanes = <1>; |
| #phy-cells = <0>; |
| cdns,phy-type = <PHY_TYPE_USB3>; |
| resets = <&serdes_wiz0 3>; |
| }; |
| }; |
| |
| &pcie1_rc { |
| status = "okay"; |
| reset-gpios = <&exp1 10 GPIO_ACTIVE_HIGH>; |
| phys = <&serdes0_pcie_link>; |
| phy-names = "pcie-phy"; |
| num-lanes = <2>; |
| }; |
| |
| &usb_serdes_mux { |
| idle-states = <0>; /* USB0 to SERDES lane 2 */ |
| }; |
| |
| &usbss0 { |
| status = "okay"; |
| pinctrl-0 = <&main_usbss0_pins_default>; |
| pinctrl-names = "default"; |
| ti,vbus-divider; |
| }; |
| |
| &usb0 { |
| dr_mode = "host"; |
| maximum-speed = "super-speed"; |
| phys = <&serdes0_usb_link>; |
| phy-names = "cdns3,usb3-phy"; |
| }; |