| // SPDX-License-Identifier: GPL-2.0+ |
| /* |
| * Copyright (C) 2016 Freescale Semiconductor, Inc. |
| */ |
| |
| #include <common.h> |
| #include <init.h> |
| #include <asm/global_data.h> |
| #include <asm/io.h> |
| #include <asm/arch/sys_proto.h> |
| #include <asm/arch/mx7ulp-pins.h> |
| #include <asm/arch/iomux.h> |
| #include <asm/gpio.h> |
| |
| DECLARE_GLOBAL_DATA_PTR; |
| |
| #define UART_PAD_CTRL (PAD_CTL_PUS_UP) |
| |
| int dram_init(void) |
| { |
| gd->ram_size = imx_ddr_size(); |
| |
| #ifdef CONFIG_OPTEE_TZDRAM_SIZE |
| gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE; |
| #endif |
| |
| return 0; |
| } |
| |
| static iomux_cfg_t const lpuart4_pads[] = { |
| MX7ULP_PAD_PTC3__LPUART4_RX | MUX_PAD_CTRL(UART_PAD_CTRL), |
| MX7ULP_PAD_PTC2__LPUART4_TX | MUX_PAD_CTRL(UART_PAD_CTRL), |
| }; |
| |
| static void setup_iomux_uart(void) |
| { |
| mx7ulp_iomux_setup_multiple_pads(lpuart4_pads, |
| ARRAY_SIZE(lpuart4_pads)); |
| } |
| |
| int board_early_init_f(void) |
| { |
| setup_iomux_uart(); |
| |
| return 0; |
| } |
| |
| int board_init(void) |
| { |
| /* address of boot parameters */ |
| gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
| |
| return 0; |
| } |
| |
| #ifdef CONFIG_SPL_BUILD |
| #include <spl.h> |
| |
| #ifdef CONFIG_SPL_LOAD_FIT |
| int board_fit_config_name_match(const char *name) |
| { |
| if (!strcmp(name, "imx7ulp-com")) |
| return 0; |
| |
| return -1; |
| } |
| #endif |
| |
| void spl_board_init(void) |
| { |
| preloader_console_init(); |
| } |
| |
| void board_init_f(ulong dummy) |
| { |
| arch_cpu_init(); |
| |
| board_early_init_f(); |
| } |
| #endif |