global: Move remaining CONFIG_SYS_* to CFG_SYS_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 33835ee..63c2729 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -77,10 +77,10 @@
#ifdef CONFIG_SYS_SCCR_TSECCM /* all TSEC's clock mode */
SCCR_TSECCM |
#endif
-#ifdef CONFIG_SYS_SCCR_TSEC1CM /* TSEC1 clock mode */
+#ifdef CFG_SYS_SCCR_TSEC1CM /* TSEC1 clock mode */
SCCR_TSEC1CM |
#endif
-#ifdef CONFIG_SYS_SCCR_TSEC2CM /* TSEC2 clock mode */
+#ifdef CFG_SYS_SCCR_TSEC2CM /* TSEC2 clock mode */
SCCR_TSEC2CM |
#endif
#ifdef CONFIG_SYS_SCCR_TSEC1ON /* TSEC1 clock switch */
@@ -92,10 +92,10 @@
#ifdef CONFIG_SYS_SCCR_USBMPHCM /* USB MPH clock mode */
SCCR_USBMPHCM |
#endif
-#ifdef CONFIG_SYS_SCCR_USBDRCM /* USB DR clock mode */
+#ifdef CFG_SYS_SCCR_USBDRCM /* USB DR clock mode */
SCCR_USBDRCM |
#endif
-#ifdef CONFIG_SYS_SCCR_SATACM /* SATA controller clock mode */
+#ifdef CFG_SYS_SCCR_SATACM /* SATA controller clock mode */
SCCR_SATACM |
#endif
0;
@@ -115,11 +115,11 @@
#ifdef CONFIG_SYS_SCCR_TSECCM /* all TSEC's clock mode */
(CONFIG_SYS_SCCR_TSECCM << SCCR_TSECCM_SHIFT) |
#endif
-#ifdef CONFIG_SYS_SCCR_TSEC1CM /* TSEC1 clock mode */
- (CONFIG_SYS_SCCR_TSEC1CM << SCCR_TSEC1CM_SHIFT) |
+#ifdef CFG_SYS_SCCR_TSEC1CM /* TSEC1 clock mode */
+ (CFG_SYS_SCCR_TSEC1CM << SCCR_TSEC1CM_SHIFT) |
#endif
-#ifdef CONFIG_SYS_SCCR_TSEC2CM /* TSEC2 clock mode */
- (CONFIG_SYS_SCCR_TSEC2CM << SCCR_TSEC2CM_SHIFT) |
+#ifdef CFG_SYS_SCCR_TSEC2CM /* TSEC2 clock mode */
+ (CFG_SYS_SCCR_TSEC2CM << SCCR_TSEC2CM_SHIFT) |
#endif
#ifdef CONFIG_SYS_SCCR_TSEC1ON /* TSEC1 clock switch */
(CONFIG_SYS_SCCR_TSEC1ON << SCCR_TSEC1ON_SHIFT) |
@@ -130,11 +130,11 @@
#ifdef CONFIG_SYS_SCCR_USBMPHCM /* USB MPH clock mode */
(CONFIG_SYS_SCCR_USBMPHCM << SCCR_USBMPHCM_SHIFT) |
#endif
-#ifdef CONFIG_SYS_SCCR_USBDRCM /* USB DR clock mode */
- (CONFIG_SYS_SCCR_USBDRCM << SCCR_USBDRCM_SHIFT) |
+#ifdef CFG_SYS_SCCR_USBDRCM /* USB DR clock mode */
+ (CFG_SYS_SCCR_USBDRCM << SCCR_USBDRCM_SHIFT) |
#endif
-#ifdef CONFIG_SYS_SCCR_SATACM /* SATA controller clock mode */
- (CONFIG_SYS_SCCR_SATACM << SCCR_SATACM_SHIFT) |
+#ifdef CFG_SYS_SCCR_SATACM /* SATA controller clock mode */
+ (CFG_SYS_SCCR_SATACM << SCCR_SATACM_SHIFT) |
#endif
0;
@@ -175,26 +175,26 @@
setbits_be32(&im->sysconf.spcr, SPCR_TBEN);
/* System General Purpose Register */
-#ifdef CONFIG_SYS_SICRH
+#ifdef CFG_SYS_SICRH
#if defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_ARCH_MPC8313)
/* regarding to MPC34x manual rev.1 bits 28..29 must be preserved */
- __raw_writel((im->sysconf.sicrh & 0x0000000C) | CONFIG_SYS_SICRH,
+ __raw_writel((im->sysconf.sicrh & 0x0000000C) | CFG_SYS_SICRH,
&im->sysconf.sicrh);
#else
- __raw_writel(CONFIG_SYS_SICRH, &im->sysconf.sicrh);
+ __raw_writel(CFG_SYS_SICRH, &im->sysconf.sicrh);
#endif
#endif
-#ifdef CONFIG_SYS_SICRL
- __raw_writel(CONFIG_SYS_SICRL, &im->sysconf.sicrl);
+#ifdef CFG_SYS_SICRL
+ __raw_writel(CFG_SYS_SICRL, &im->sysconf.sicrl);
#endif
-#ifdef CONFIG_SYS_GPR1
- __raw_writel(CONFIG_SYS_GPR1, &im->sysconf.gpr1);
+#ifdef CFG_SYS_GPR1
+ __raw_writel(CFG_SYS_GPR1, &im->sysconf.gpr1);
#endif
-#ifdef CONFIG_SYS_DDRCDR /* DDR control driver register */
- __raw_writel(CONFIG_SYS_DDRCDR, &im->sysconf.ddrcdr);
+#ifdef CFG_SYS_DDRCDR /* DDR control driver register */
+ __raw_writel(CFG_SYS_DDRCDR, &im->sysconf.ddrcdr);
#endif
-#ifdef CONFIG_SYS_OBIR /* Output buffer impedance register */
- __raw_writel(CONFIG_SYS_OBIR, &im->sysconf.obir);
+#ifdef CFG_SYS_OBIR /* Output buffer impedance register */
+ __raw_writel(CFG_SYS_OBIR, &im->sysconf.obir);
#endif
#if !defined(CONFIG_PINCTRL)
diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
index 6d1c6b0..4f982b8 100644
--- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
+++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
@@ -59,9 +59,9 @@
printf(", %s MHz)", strmhz(buf, gd->mem_clk));
-#if defined(CONFIG_SYS_LB_SDRAM) && defined(CONFIG_SYS_LBC_SDRAM_SIZE)
+#if defined(CONFIG_SYS_LB_SDRAM) && defined(CFG_SYS_LBC_SDRAM_SIZE)
puts("\nSDRAM: ");
- print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, " (local bus)");
+ print_size (CFG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, " (local bus)");
#endif
}
@@ -204,12 +204,12 @@
return 0;
}
-#ifdef CONFIG_SYS_DDRCDR_VALUE
+#ifdef CFG_SYS_DDRCDR_VALUE
/*
* Adjust DDR II IO voltage biasing. It just makes it work.
*/
if(spd.mem_type == SPD_MEMTYPE_DDR2) {
- immap->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE;
+ immap->sysconf.ddrcdr = CFG_SYS_DDRCDR_VALUE;
}
udelay(50000);
#endif
@@ -693,7 +693,7 @@
ddr->sdram_mode =
(0
| (1 << (16 + 10)) /* DQS Differential disable */
-#ifdef CONFIG_SYS_DDR_MODE_WEAK
+#ifdef CFG_SYS_DDR_MODE_WEAK
| (1 << (16 + 1)) /* weak driver (~60%) */
#endif
| (add_lat << (16 + 3)) /* Additive Latency in EMRS1 */
@@ -767,8 +767,8 @@
debug("DDR: sdram_cfg2 = 0x%08x\n", ddr->sdram_cfg2);
}
-#ifdef CONFIG_SYS_DDR_SDRAM_CLK_CNTL /* Optional platform specific value */
- ddr->sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL;
+#ifdef CFG_SYS_DDR_SDRAM_CLK_CNTL /* Optional platform specific value */
+ ddr->sdram_clk_cntl = CFG_SYS_DDR_SDRAM_CLK_CNTL;
#endif
debug("DDR:sdram_clk_cntl=0x%08x\n", ddr->sdram_clk_cntl);
diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
index 8fcf208..7cc0383 100644
--- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c
+++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
@@ -54,12 +54,12 @@
im->sysconf.spcr |= SPCR_TBEN;
/* DDR control driver register */
-#ifdef CONFIG_SYS_DDRCDR
- im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR;
+#ifdef CFG_SYS_DDRCDR
+ im->sysconf.ddrcdr = CFG_SYS_DDRCDR;
#endif
/* Output buffer impedance register */
-#ifdef CONFIG_SYS_OBIR
- im->sysconf.obir = CONFIG_SYS_OBIR;
+#ifdef CFG_SYS_OBIR
+ im->sysconf.obir = CFG_SYS_OBIR;
#endif
/*
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index 8a351b9..52326f0 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -246,7 +246,7 @@
#if CONFIG_VAL(SYS_MALLOC_F_LEN)
-#if CONFIG_VAL(SYS_MALLOC_F_LEN) + GENERATED_GBL_DATA_SIZE > CONFIG_SYS_INIT_RAM_SIZE
+#if CONFIG_VAL(SYS_MALLOC_F_LEN) + GENERATED_GBL_DATA_SIZE > CFG_SYS_INIT_RAM_SIZE
#error "SYS_MALLOC_F_LEN too large to fit into initial RAM."
#endif
@@ -486,7 +486,7 @@
#if defined(CONFIG_WATCHDOG)
/* Initialise the Watchdog values and reset it (if req) */
/*------------------------------------------------------*/
- lis r4, CONFIG_SYS_WATCHDOG_VALUE
+ lis r4, CFG_SYS_WATCHDOG_VALUE
ori r4, r4, (SWCRR_SWEN | SWCRR_SWRI | SWCRR_SWPR)
stw r4, SWCRR(r3)
@@ -1048,10 +1048,10 @@
lock_ram_in_cache:
/* Allocate Initial RAM in data cache.
*/
- lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
- ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
- li r4, ((CONFIG_SYS_INIT_RAM_SIZE & ~31) + \
- (CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32
+ lis r3, (CFG_SYS_INIT_RAM_ADDR & ~31)@h
+ ori r3, r3, (CFG_SYS_INIT_RAM_ADDR & ~31)@l
+ li r4, ((CFG_SYS_INIT_RAM_SIZE & ~31) + \
+ (CFG_SYS_INIT_RAM_ADDR & 31) + 31) / 32
mtctr r4
1:
dcbz r0, r3
@@ -1070,10 +1070,10 @@
.globl unlock_ram_in_cache
unlock_ram_in_cache:
/* invalidate the INIT_RAM section */
- lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
- ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
- li r4, ((CONFIG_SYS_INIT_RAM_SIZE & ~31) + \
- (CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32
+ lis r3, (CFG_SYS_INIT_RAM_ADDR & ~31)@h
+ ori r3, r3, (CFG_SYS_INIT_RAM_ADDR & ~31)@l
+ li r4, ((CFG_SYS_INIT_RAM_SIZE & ~31) + \
+ (CFG_SYS_INIT_RAM_ADDR & 31) + 31) / 32
mtctr r4
1: icbi r0, r3
dcbi r0, r3
@@ -1122,14 +1122,14 @@
* LBIU Local Access Widow 0 will not cover this memory space. So, we
* need another window to map in it.
*/
- lis r4, (CONFIG_SYS_FLASH_BASE)@h
- ori r4, r4, (CONFIG_SYS_FLASH_BASE)@l
- stw r4, LBLAWBAR1(r3) /* LBLAWBAR1 <= CONFIG_SYS_FLASH_BASE */
+ lis r4, (CFG_SYS_FLASH_BASE)@h
+ ori r4, r4, (CFG_SYS_FLASH_BASE)@l
+ stw r4, LBLAWBAR1(r3) /* LBLAWBAR1 <= CFG_SYS_FLASH_BASE */
- /* Store 0x80000012 + log2(CONFIG_SYS_FLASH_SIZE) into LBLAWAR1 */
+ /* Store 0x80000012 + log2(CFG_SYS_FLASH_SIZE) into LBLAWAR1 */
lis r4, (0x80000012)@h
ori r4, r4, (0x80000012)@l
- li r5, CONFIG_SYS_FLASH_SIZE
+ li r5, CFG_SYS_FLASH_SIZE
1: srawi. r5, r5, 1 /* r5 = r5 >> 1 */
addi r4, r4, 1
bne 1b
@@ -1150,24 +1150,24 @@
lwz r4, BR0(r3)
li r5, 0x7FFF
and r4, r4, r5
- lis r5, (CONFIG_SYS_FLASH_BASE & 0xFFFF8000)@h
- ori r5, r5, (CONFIG_SYS_FLASH_BASE & 0xFFFF8000)@l
+ lis r5, (CFG_SYS_FLASH_BASE & 0xFFFF8000)@h
+ ori r5, r5, (CFG_SYS_FLASH_BASE & 0xFFFF8000)@l
or r5, r5, r4
- stw r5, BR0(r3) /* r5 <= (CONFIG_SYS_FLASH_BASE & 0xFFFF8000) | (BR0 & 0x00007FFF) */
+ stw r5, BR0(r3) /* r5 <= (CFG_SYS_FLASH_BASE & 0xFFFF8000) | (BR0 & 0x00007FFF) */
lwz r4, OR0(r3)
- lis r5, ~((CONFIG_SYS_FLASH_SIZE << 4) - 1)
+ lis r5, ~((CFG_SYS_FLASH_SIZE << 4) - 1)
or r4, r4, r5
stw r4, OR0(r3)
- lis r4, (CONFIG_SYS_FLASH_BASE)@h
- ori r4, r4, (CONFIG_SYS_FLASH_BASE)@l
- stw r4, LBLAWBAR0(r3) /* LBLAWBAR0 <= CONFIG_SYS_FLASH_BASE */
+ lis r4, (CFG_SYS_FLASH_BASE)@h
+ ori r4, r4, (CFG_SYS_FLASH_BASE)@l
+ stw r4, LBLAWBAR0(r3) /* LBLAWBAR0 <= CFG_SYS_FLASH_BASE */
- /* Store 0x80000012 + log2(CONFIG_SYS_FLASH_SIZE) into LBLAWAR0 */
+ /* Store 0x80000012 + log2(CFG_SYS_FLASH_SIZE) into LBLAWAR0 */
lis r4, (0x80000012)@h
ori r4, r4, (0x80000012)@l
- li r5, CONFIG_SYS_FLASH_SIZE
+ li r5, CFG_SYS_FLASH_SIZE
1: srawi. r5, r5, 1 /* r5 = r5 >> 1 */
addi r4, r4, 1
bne 1b
diff --git a/arch/powerpc/cpu/mpc83xx/sysio/sysio.h b/arch/powerpc/cpu/mpc83xx/sysio/sysio.h
index f8c2f10..b2f9807 100644
--- a/arch/powerpc/cpu/mpc83xx/sysio/sysio.h
+++ b/arch/powerpc/cpu/mpc83xx/sysio/sysio.h
@@ -1,7 +1,7 @@
#ifdef CONFIG_ARCH_MPC8308
-#ifndef CONFIG_SYS_SICRL
-#define CONFIG_SYS_SICRL (\
+#ifndef CFG_SYS_SICRL
+#define CFG_SYS_SICRL (\
CONFIG_SICRL_SPI |\
CONFIG_SICRL_UART |\
CONFIG_SICRL_IRQ |\
@@ -10,8 +10,8 @@
)
#endif
-#ifndef CONFIG_SYS_SICRH
-#define CONFIG_SYS_SICRH (\
+#ifndef CFG_SYS_SICRH
+#define CFG_SYS_SICRH (\
CONFIG_SICRH_ESDHC_A |\
CONFIG_SICRH_ESDHC_B |\
CONFIG_SICRH_ESDHC_C |\