| // SPDX-License-Identifier: GPL-2.0+ OR MIT |
| /* |
| * Apple T7000 "A8" SoC |
| * |
| * Other names: H7P, "Fiji" |
| * |
| * Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org> |
| * Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts. |
| */ |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/interrupt-controller/apple-aic.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| #include <dt-bindings/pinctrl/apple.h> |
| |
| / { |
| interrupt-parent = <&aic>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| clkref: clock-ref { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <24000000>; |
| clock-output-names = "clkref"; |
| }; |
| |
| cpus { |
| #address-cells = <2>; |
| #size-cells = <0>; |
| |
| cpu0: cpu@0 { |
| compatible = "apple,typhoon"; |
| reg = <0x0 0x0>; |
| cpu-release-addr = <0 0>; /* To be filled in by loader */ |
| enable-method = "spin-table"; |
| device_type = "cpu"; |
| }; |
| |
| cpu1: cpu@1 { |
| compatible = "apple,typhoon"; |
| reg = <0x0 0x1>; |
| cpu-release-addr = <0 0>; /* To be filled in by loader */ |
| enable-method = "spin-table"; |
| device_type = "cpu"; |
| }; |
| }; |
| |
| soc { |
| compatible = "simple-bus"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| nonposted-mmio; |
| ranges; |
| |
| serial0: serial@20a0c0000 { |
| compatible = "apple,s5l-uart"; |
| reg = <0x2 0x0a0c0000 0x0 0x4000>; |
| reg-io-width = <4>; |
| interrupt-parent = <&aic>; |
| interrupts = <AIC_IRQ 158 IRQ_TYPE_LEVEL_HIGH>; |
| /* Use the bootloader-enabled clocks for now. */ |
| clocks = <&clkref>, <&clkref>; |
| clock-names = "uart", "clk_uart_baud0"; |
| status = "disabled"; |
| }; |
| |
| serial6: serial@20a0d8000 { |
| compatible = "apple,s5l-uart"; |
| reg = <0x2 0x0a0d8000 0x0 0x4000>; |
| reg-io-width = <4>; |
| interrupt-parent = <&aic>; |
| interrupts = <AIC_IRQ 164 IRQ_TYPE_LEVEL_HIGH>; |
| /* Use the bootloader-enabled clocks for now. */ |
| clocks = <&clkref>, <&clkref>; |
| clock-names = "uart", "clk_uart_baud0"; |
| status = "disabled"; |
| }; |
| |
| wdt: watchdog@20e027000 { |
| compatible = "apple,t7000-wdt", "apple,wdt"; |
| reg = <0x2 0x0e027000 0x0 0x1000>; |
| clocks = <&clkref>; |
| interrupt-parent = <&aic>; |
| interrupts = <AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| |
| aic: interrupt-controller@20e100000 { |
| compatible = "apple,t7000-aic", "apple,aic"; |
| reg = <0x2 0x0e100000 0x0 0x100000>; |
| #interrupt-cells = <3>; |
| interrupt-controller; |
| }; |
| |
| pinctrl: pinctrl@20e300000 { |
| compatible = "apple,t7000-pinctrl", "apple,pinctrl"; |
| reg = <0x2 0x0e300000 0x0 0x100000>; |
| |
| gpio-controller; |
| #gpio-cells = <2>; |
| gpio-ranges = <&pinctrl 0 0 208>; |
| apple,npins = <208>; |
| |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| interrupt-parent = <&aic>; |
| interrupts = <AIC_IRQ 62 IRQ_TYPE_LEVEL_HIGH>, |
| <AIC_IRQ 63 IRQ_TYPE_LEVEL_HIGH>, |
| <AIC_IRQ 64 IRQ_TYPE_LEVEL_HIGH>, |
| <AIC_IRQ 65 IRQ_TYPE_LEVEL_HIGH>, |
| <AIC_IRQ 66 IRQ_TYPE_LEVEL_HIGH>, |
| <AIC_IRQ 67 IRQ_TYPE_LEVEL_HIGH>, |
| <AIC_IRQ 68 IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| }; |
| |
| timer { |
| compatible = "arm,armv8-timer"; |
| interrupt-parent = <&aic>; |
| interrupt-names = "phys", "virt"; |
| /* Note that A8 doesn't actually have a hypervisor (EL2 is not implemented). */ |
| interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>, |
| <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>; |
| }; |
| }; |