Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
5e6fe8b51a6519628375f15d9ae42917b1c4fc39
/
.
/
board
/
phytec
/
common
/
k3
/
Kconfig
blob: 282f4b7974290ec113ed95ab7f35a752908a53d5 [
file
] [
log
] [
blame
]
config PHYTEC_K3_DDR_PATCH
bool
"Patch DDR timings on PHYTEC K3 SoMs"
help
Allow
to
override
default
DDR timings prior to
DDRSS driver probing
.