| commit | 5cc605f1d60ddfb92f8289ffe121e1d7438e9a11 | [log] [tgz] |
|---|---|---|
| author | Grzegorz Bernacki <gjb@semihalf.com> | Wed Jan 16 15:12:47 2008 +0100 |
| committer | Wolfgang Denk <wd@denx.de> | Thu Jan 17 09:31:58 2008 +0100 |
| tree | 8e3ba14866674209e364e7617efc647da1d21168 | |
| parent | ff2d134cde51dd109997085c66210f22e761c7dd [diff] |
Set ips dividor to 1/4 of csb clock. Previous setting cause ips clock to be out of spec. This bug was found by John Rigby from Freescale. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>