b490aa57196a64b5d55fed1d29f1abe0aa08c562 - filogic/uboot

commit	b490aa57196a64b5d55fed1d29f1abe0aa08c562	[log] [tgz]
author	Jagan Teki <jagan@amarulasolutions.com>	Sun Dec 30 21:37:31 2018 +0530
committer	Jagan Teki <jagan@amarulasolutions.com>	Fri Jan 18 22:19:09 2019 +0530
tree	1a4d280a42846a742a33c8218c35e8ff2b023c36
parent	8cf08ea958eaee5836f2488a06028f486ba87027 [diff]

clk: sunxi: Implement UART resets

Implement UART resets for all relevant Allwinner SoC
clock drivers via ccu reset table.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>

drivers/clk/sunxi/clk_a23.c[diff]
drivers/clk/sunxi/clk_a31.c[diff]
drivers/clk/sunxi/clk_a64.c[diff]
drivers/clk/sunxi/clk_a83t.c[diff]
drivers/clk/sunxi/clk_h3.c[diff]
drivers/clk/sunxi/clk_r40.c[diff]
drivers/clk/sunxi/clk_v3s.c[diff]

7 files changed

tree: 1a4d280a42846a742a33c8218c35e8ff2b023c36