| CONFIG_ARM=y | |
| CONFIG_ARCH_SOCFPGA=y | |
| CONFIG_SYS_MALLOC_F_LEN=0x2000 | |
| CONFIG_SPL_DM=y | |
| CONFIG_DM_GPIO=y | |
| CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y | |
| CONFIG_SPL_STACK_R_ADDR=0x00800000 | |
| CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" | |
| CONFIG_SPL=y | |
| CONFIG_SPL_STACK_R=y | |
| # CONFIG_CMD_IMLS is not set | |
| # CONFIG_CMD_FLASH is not set | |
| CONFIG_CMD_GPIO=y | |
| CONFIG_SPL_SIMPLE_BUS=y | |
| CONFIG_DWAPB_GPIO=y | |
| CONFIG_DM_ETH=y | |
| CONFIG_ETH_DESIGNWARE=y | |
| CONFIG_SYS_NS16550=y | |
| CONFIG_CADENCE_QSPI=y | |
| CONFIG_DESIGNWARE_SPI=y |