| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| $id: http://devicetree.org/schemas/phy/qcom,pcie2-phy.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| title: Qualcomm PCIe2 PHY controller |
| - Vinod Koul <vkoul@kernel.org> |
| The Qualcomm PCIe2 PHY is a Synopsys based phy found in a number of Qualcomm |
| - const: qcom,qcs404-pcie2-phy |
| - description: PHY register set |
| - description: a clock-specifier pair for the "pipe" clock |
| description: low voltage regulator |
| description: high voltage regulator |
| additionalProperties: false |
| #include <dt-bindings/clock/qcom,gcc-qcs404.h> |
| compatible = "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy"; |
| clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; |
| resets = <&gcc GCC_PCIEPHY_0_PHY_BCR>, |
| <&gcc GCC_PCIE_0_PIPE_ARES>; |
| reset-names = "phy", "pipe"; |
| vdda-vp-supply = <&vreg_l3_1p05>; |
| vdda-vph-supply = <&vreg_l5_1p8>; |
| clock-output-names = "pcie_0_pipe_clk"; |