| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| * (C) Copyright 2019 Rockchip Electronics Co., Ltd |
| #include "rockchip-u-boot.dtsi" |
| u-boot,spl-boot-order = &emmc, &sdmmc; |
| compatible = "rockchip,px30-dmc", "syscon"; |
| reg = <0x0 0xff2a0000 0x0 0x1000>; |
| compatible = "rockchip,cryptov2-rng"; |
| reg = <0x0 0xff0b0000 0x0 0x4000>; |
| clock-frequency = <24000000>; |
| clock-frequency = <24000000>; |
| /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ |
| /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ |
| /delete-property/ assigned-clocks; |
| /delete-property/ assigned-clock-rates; |
| /delete-property/ assigned-clocks; |
| /delete-property/ assigned-clock-rates; |