| * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com |
| * Developed for DENX Software Engineering GmbH |
| * SPDX-License-Identifier: GPL-2.0+ |
| #if CONFIG_POST & CONFIG_SYS_POST_DSP |
| /* This test verifies DSP status bits in FPGA */ |
| #define DSP_STATUS_REG 0xC4000008 |
| #define FPGA_STATUS_REG 0xC400000C |
| int dsp_post_test(int flags) |
| /* momorize fpga status */ |
| old_value = in_be32((void *)FPGA_STATUS_REG); |
| out_be32((void *)FPGA_STATUS_REG, 0x30); |
| /* generate sync signal */ |
| out_be32((void *)DSP_STATUS_REG, 0x300); |
| out_be32((void *)DSP_STATUS_REG, 0); |
| read_value = in_be32((void *)DSP_STATUS_REG) & 0x3; |
| if (read_value != 0x03) { |
| post_log("\nDSP status read %08X\n", read_value); |
| /* restore fpga status */ |
| out_be32((void *)FPGA_STATUS_REG, old_value); |
| #endif /* CONFIG_POST & CONFIG_SYS_POST_DSP */ |