| // SPDX-License-Identifier: GPL-2.0 OR MIT |
| * Copyright (C) 2017 exceet electronics GmbH |
| * Copyright (C) 2018 Kontron Electronics GmbH |
| * To make the PHYs work, we need to set the reset pin once. Afterwards |
| * in Linux we can't assign the shared reset GPIO to the PHYs, as this |
| * would cause Linux to reset both PHYs every time one of them gets |
| * Also we disable the second ethernet as it currently doesn't work with |
| * the devicetree setup in U-Boot. |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_enet1 &pinctrl_enet1_mdio>; |
| phy-reset-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>; |
| ethphy1: ethernet-phy@1 { |
| clocks = <&clks IMX6UL_CLK_ENET_REF>; |
| clock-names = "rmii-ref"; |
| /delete-property/ phy-handle; |