common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.
Signed-off-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/mips/mach-mscc/include/mach/ddr.h b/arch/mips/mach-mscc/include/mach/ddr.h
index bf75e52..d52eabb 100644
--- a/arch/mips/mach-mscc/include/mach/ddr.h
+++ b/arch/mips/mach-mscc/include/mach/ddr.h
@@ -9,6 +9,7 @@
#include <asm/cacheops.h>
#include <asm/io.h>
#include <asm/reboot.h>
+#include <linux/bitops.h>
#include <mach/common.h>
#define MIPS_VCOREIII_MEMORY_DDR3
diff --git a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h
index 4a1228d..8d1d21b 100644
--- a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h
@@ -6,6 +6,8 @@
#ifndef _MSCC_JR2_DEVCPU_GCB_H_
#define _MSCC_JR2_DEVCPU_GCB_H_
+#include <linux/bitops.h>
+
#define PERF_GPR 0x4
#define PERF_SOFT_RST 0x8
diff --git a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h
index 3c84edc..e11ad87 100644
--- a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h
@@ -6,6 +6,8 @@
#ifndef _MSCC_JR2_DEVCPU_GCB_MIIM_REGS_H_
#define _MSCC_JR2_DEVCPU_GCB_MIIM_REGS_H_
+#include <linux/bitops.h>
+
#define MIIM_MII_STATUS(gi) (0xc8 + (gi * 36))
#define MIIM_MII_CMD(gi) (0xd0 + (gi * 36))
#define MIIM_MII_DATA(gi) (0xd4 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h
index 6e0bbe2..151bb3e 100644
--- a/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h
@@ -6,6 +6,8 @@
#ifndef _MSCC_JR2_ICPU_CFG_H_
#define _MSCC_JR2_ICPU_CFG_H_
+#include <linux/bitops.h>
+
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x4
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h
index a74a685..750a801 100644
--- a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_DEVCPU_GCB_H_
#define _MSCC_OCELOT_DEVCPU_GCB_H_
+#include <linux/bitops.h>
#define PERF_SOFT_RST 0x90
#define PERF_SOFT_RST_SOFT_SWC_RST BIT(1)
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h
index 2303734..07c4f9a 100644
--- a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h
@@ -8,6 +8,7 @@
#ifndef _MSCC_LUTON_MIIM_REGS_H_
#define _MSCC_LUTON_MIIM_REGS_H_
+#include <linux/bitops.h>
#define MIIM_MII_STATUS(gi) (0xa0 + (gi * 36))
#define MIIM_MII_CMD(gi) (0xa8 + (gi * 36))
#define MIIM_MII_DATA(gi) (0xac + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h
index 9233f03..ded7c5f 100644
--- a/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_ICPU_CFG_H_
#define _MSCC_OCELOT_ICPU_CFG_H_
+#include <linux/bitops.h>
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x4
diff --git a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
index b2a4203..5715ec1 100644
--- a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_DEVCPU_GCB_H_
#define _MSCC_OCELOT_DEVCPU_GCB_H_
+#include <linux/bitops.h>
#define PERF_SOFT_RST 0x8
#define PERF_SOFT_RST_SOFT_NON_CFG_RST BIT(2)
diff --git a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h
index 4ad9221..50cf073 100644
--- a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_DEVCPU_GCB_MIIM_REGS_H_
#define _MSCC_OCELOT_DEVCPU_GCB_MIIM_REGS_H_
+#include <linux/bitops.h>
#define MIIM_MII_STATUS(gi) (0x9c + (gi * 36))
#define MIIM_MII_CMD(gi) (0xa4 + (gi * 36))
#define MIIM_MII_DATA(gi) (0xa8 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h
index 04cf70b..fb10bf2 100644
--- a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_ICPU_CFG_H_
#define _MSCC_OCELOT_ICPU_CFG_H_
+#include <linux/bitops.h>
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x4
diff --git a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h
index 9b80fdb..43d40be 100644
--- a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVAL_DEVCPU_GCB_H_
#define _MSCC_SERVAL_DEVCPU_GCB_H_
+#include <linux/bitops.h>
#define CHIP_ID 0x0
#define PERF_GPR 0x4
diff --git a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h
index a3abbc40..e8cb1dc 100644
--- a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVAL_DEVCPU_GCB_MIIM_REGS_H_
#define _MSCC_SERVAL_DEVCPU_GCB_MIIM_REGS_H_
+#include <linux/bitops.h>
#define MIIM_MII_STATUS(gi) (0x5c + (gi * 36))
#define MIIM_MII_CMD(gi) (0x64 + (gi * 36))
#define MIIM_MII_DATA(gi) (0x68 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h
index b8c9d5c..4d4151b 100644
--- a/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVAL_ICPU_CFG_H_
#define _MSCC_SERVAL_ICPU_CFG_H_
+#include <linux/bitops.h>
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x8
diff --git a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h
index 493eaad..7d6c64f 100644
--- a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVALT_DEVCPU_GCB_H_
#define _MSCC_SERVALT_DEVCPU_GCB_H_
+#include <linux/bitops.h>
#define PERF_GPR 0x4
#define PERF_SOFT_RST 0x8
diff --git a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h
index 8c67190..72d7c4d 100644
--- a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVALT_DEVCPU_GCB_MIIM_REGS_H_
#define _MSCC_SERVALT_DEVCPU_GCB_MIIM_REGS_H_
+#include <linux/bitops.h>
#define MIIM_MII_STATUS(gi) (0xc4 + (gi * 36))
#define MIIM_MII_CMD(gi) (0xcc + (gi * 36))
#define MIIM_MII_DATA(gi) (0xd0 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h
index 491ead1..13967f6 100644
--- a/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVALT_ICPU_CFG_H_
#define _MSCC_SERVALT_ICPU_CFG_H_
+#include <linux/bitops.h>
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x8
diff --git a/arch/mips/mach-mscc/include/mach/tlb.h b/arch/mips/mach-mscc/include/mach/tlb.h
index fdb554f..ebd8ad0 100644
--- a/arch/mips/mach-mscc/include/mach/tlb.h
+++ b/arch/mips/mach-mscc/include/mach/tlb.h
@@ -7,6 +7,7 @@
#define __ASM_MACH_TLB_H
#include <asm/mipsregs.h>
+#include <linux/bitops.h>
#include <mach/common.h>
#include <linux/sizes.h>