common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.
Signed-off-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/mips/include/asm/cm.h b/arch/mips/include/asm/cm.h
index 8f37471..3878171 100644
--- a/arch/mips/include/asm/cm.h
+++ b/arch/mips/include/asm/cm.h
@@ -39,6 +39,7 @@
#ifndef __ASSEMBLY__
#include <asm/io.h>
+#include <linux/bitops.h>
static inline void *mips_cm_base(void)
{
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index f80311e..7538e6b 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -27,6 +27,7 @@
#ifdef __ASSEMBLY__
#define _ULCAST_
#else
+#include <linux/bitops.h>
#define _ULCAST_ (unsigned long)
#endif
diff --git a/arch/mips/lib/reloc.c b/arch/mips/lib/reloc.c
index 1e3cfad..ffc8c7a 100644
--- a/arch/mips/lib/reloc.c
+++ b/arch/mips/lib/reloc.c
@@ -31,6 +31,7 @@
#include <init.h>
#include <asm/relocs.h>
#include <asm/sections.h>
+#include <linux/bitops.h>
/**
* read_uint() - Read an unsigned integer from the buffer
diff --git a/arch/mips/mach-ath79/ar933x/ddr.c b/arch/mips/mach-ath79/ar933x/ddr.c
index 2cf0b2c..09166ec 100644
--- a/arch/mips/mach-ath79/ar933x/ddr.c
+++ b/arch/mips/mach-ath79/ar933x/ddr.c
@@ -8,6 +8,7 @@
#include <asm/io.h>
#include <asm/addrspace.h>
#include <asm/types.h>
+#include <linux/bitops.h>
#include <mach/ar71xx_regs.h>
#include <mach/ath79.h>
diff --git a/arch/mips/mach-ath79/ar934x/clk.c b/arch/mips/mach-ath79/ar934x/clk.c
index bb972b3..9fa2225 100644
--- a/arch/mips/mach-ath79/ar934x/clk.c
+++ b/arch/mips/mach-ath79/ar934x/clk.c
@@ -10,6 +10,7 @@
#include <asm/io.h>
#include <asm/addrspace.h>
#include <asm/types.h>
+#include <linux/bitops.h>
#include <linux/delay.h>
#include <mach/ar71xx_regs.h>
#include <mach/ath79.h>
diff --git a/arch/mips/mach-ath79/ar934x/ddr.c b/arch/mips/mach-ath79/ar934x/ddr.c
index 9c5a6b6..218f60a 100644
--- a/arch/mips/mach-ath79/ar934x/ddr.c
+++ b/arch/mips/mach-ath79/ar934x/ddr.c
@@ -9,6 +9,7 @@
#include <asm/io.h>
#include <asm/addrspace.h>
#include <asm/types.h>
+#include <linux/bitops.h>
#include <linux/delay.h>
#include <mach/ar71xx_regs.h>
#include <mach/ath79.h>
diff --git a/arch/mips/mach-ath79/qca953x/ddr.c b/arch/mips/mach-ath79/qca953x/ddr.c
index 3a009bb..78f2370 100644
--- a/arch/mips/mach-ath79/qca953x/ddr.c
+++ b/arch/mips/mach-ath79/qca953x/ddr.c
@@ -8,6 +8,7 @@
#include <asm/io.h>
#include <asm/addrspace.h>
#include <asm/types.h>
+#include <linux/bitops.h>
#include <linux/delay.h>
#include <mach/ar71xx_regs.h>
#include <mach/ath79.h>
diff --git a/arch/mips/mach-ath79/reset.c b/arch/mips/mach-ath79/reset.c
index 62330a6..6cd5e77 100644
--- a/arch/mips/mach-ath79/reset.c
+++ b/arch/mips/mach-ath79/reset.c
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <asm/io.h>
diff --git a/arch/mips/mach-jz47xx/include/mach/jz4780_dram.h b/arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
index 92d431b..61cc148 100644
--- a/arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
+++ b/arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
@@ -12,6 +12,7 @@
/*
* DDR
*/
+#include <linux/bitops.h>
#define DDRC_ST 0x0
#define DDRC_CFG 0x4
#define DDRC_CTRL 0x8
diff --git a/arch/mips/mach-jz47xx/jz4780/gpio.c b/arch/mips/mach-jz47xx/jz4780/gpio.c
index cee2328..d4884e7 100644
--- a/arch/mips/mach-jz47xx/jz4780/gpio.c
+++ b/arch/mips/mach-jz47xx/jz4780/gpio.c
@@ -3,6 +3,7 @@
#include <config.h>
#include <common.h>
#include <asm/io.h>
+#include <linux/bitops.h>
#include <mach/jz4780.h>
int jz47xx_gpio_get_value(unsigned int gpio)
diff --git a/arch/mips/mach-jz47xx/jz4780/pll.c b/arch/mips/mach-jz47xx/jz4780/pll.c
index 43827d1..323c634 100644
--- a/arch/mips/mach-jz47xx/jz4780/pll.c
+++ b/arch/mips/mach-jz47xx/jz4780/pll.c
@@ -9,6 +9,7 @@
#include <config.h>
#include <common.h>
#include <asm/io.h>
+#include <linux/bitops.h>
#include <linux/delay.h>
#include <mach/jz4780.h>
diff --git a/arch/mips/mach-jz47xx/jz4780/reset.c b/arch/mips/mach-jz47xx/jz4780/reset.c
index 73af347..bf6addc 100644
--- a/arch/mips/mach-jz47xx/jz4780/reset.c
+++ b/arch/mips/mach-jz47xx/jz4780/reset.c
@@ -9,6 +9,7 @@
#include <config.h>
#include <common.h>
#include <asm/io.h>
+#include <linux/bitops.h>
#include <mach/jz4780.h>
/* WDT */
diff --git a/arch/mips/mach-jz47xx/jz4780/sdram.c b/arch/mips/mach-jz47xx/jz4780/sdram.c
index efbb82f..690f3c5 100644
--- a/arch/mips/mach-jz47xx/jz4780/sdram.c
+++ b/arch/mips/mach-jz47xx/jz4780/sdram.c
@@ -13,6 +13,7 @@
#include <hang.h>
#include <init.h>
#include <asm/io.h>
+#include <linux/bitops.h>
#include <linux/delay.h>
#include <mach/jz4780.h>
#include <mach/jz4780_dram.h>
diff --git a/arch/mips/mach-jz47xx/jz4780/timer.c b/arch/mips/mach-jz47xx/jz4780/timer.c
index 70db74d..82bb9e8 100644
--- a/arch/mips/mach-jz47xx/jz4780/timer.c
+++ b/arch/mips/mach-jz47xx/jz4780/timer.c
@@ -14,6 +14,7 @@
#include <time.h>
#include <asm/io.h>
#include <asm/mipsregs.h>
+#include <linux/bitops.h>
#include <linux/delay.h>
#include <mach/jz4780.h>
diff --git a/arch/mips/mach-mscc/cpu.c b/arch/mips/mach-mscc/cpu.c
index 8273a0f5..b4ffd44 100644
--- a/arch/mips/mach-mscc/cpu.c
+++ b/arch/mips/mach-mscc/cpu.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <init.h>
+#include <linux/bitops.h>
#include <asm/io.h>
#include <asm/types.h>
diff --git a/arch/mips/mach-mscc/gpio.c b/arch/mips/mach-mscc/gpio.c
index 5e3a533..d6b4c5d 100644
--- a/arch/mips/mach-mscc/gpio.c
+++ b/arch/mips/mach-mscc/gpio.c
@@ -5,6 +5,7 @@
#include <common.h>
#include <asm/io.h>
+#include <linux/bitops.h>
void mscc_gpio_set_alternate(int gpio, int mode)
{
diff --git a/arch/mips/mach-mscc/include/mach/ddr.h b/arch/mips/mach-mscc/include/mach/ddr.h
index bf75e52..d52eabb 100644
--- a/arch/mips/mach-mscc/include/mach/ddr.h
+++ b/arch/mips/mach-mscc/include/mach/ddr.h
@@ -9,6 +9,7 @@
#include <asm/cacheops.h>
#include <asm/io.h>
#include <asm/reboot.h>
+#include <linux/bitops.h>
#include <mach/common.h>
#define MIPS_VCOREIII_MEMORY_DDR3
diff --git a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h
index 4a1228d..8d1d21b 100644
--- a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h
@@ -6,6 +6,8 @@
#ifndef _MSCC_JR2_DEVCPU_GCB_H_
#define _MSCC_JR2_DEVCPU_GCB_H_
+#include <linux/bitops.h>
+
#define PERF_GPR 0x4
#define PERF_SOFT_RST 0x8
diff --git a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h
index 3c84edc..e11ad87 100644
--- a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h
@@ -6,6 +6,8 @@
#ifndef _MSCC_JR2_DEVCPU_GCB_MIIM_REGS_H_
#define _MSCC_JR2_DEVCPU_GCB_MIIM_REGS_H_
+#include <linux/bitops.h>
+
#define MIIM_MII_STATUS(gi) (0xc8 + (gi * 36))
#define MIIM_MII_CMD(gi) (0xd0 + (gi * 36))
#define MIIM_MII_DATA(gi) (0xd4 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h
index 6e0bbe2..151bb3e 100644
--- a/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h
@@ -6,6 +6,8 @@
#ifndef _MSCC_JR2_ICPU_CFG_H_
#define _MSCC_JR2_ICPU_CFG_H_
+#include <linux/bitops.h>
+
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x4
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h
index a74a685..750a801 100644
--- a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_DEVCPU_GCB_H_
#define _MSCC_OCELOT_DEVCPU_GCB_H_
+#include <linux/bitops.h>
#define PERF_SOFT_RST 0x90
#define PERF_SOFT_RST_SOFT_SWC_RST BIT(1)
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h
index 2303734..07c4f9a 100644
--- a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h
@@ -8,6 +8,7 @@
#ifndef _MSCC_LUTON_MIIM_REGS_H_
#define _MSCC_LUTON_MIIM_REGS_H_
+#include <linux/bitops.h>
#define MIIM_MII_STATUS(gi) (0xa0 + (gi * 36))
#define MIIM_MII_CMD(gi) (0xa8 + (gi * 36))
#define MIIM_MII_DATA(gi) (0xac + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h
index 9233f03..ded7c5f 100644
--- a/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_ICPU_CFG_H_
#define _MSCC_OCELOT_ICPU_CFG_H_
+#include <linux/bitops.h>
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x4
diff --git a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
index b2a4203..5715ec1 100644
--- a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_DEVCPU_GCB_H_
#define _MSCC_OCELOT_DEVCPU_GCB_H_
+#include <linux/bitops.h>
#define PERF_SOFT_RST 0x8
#define PERF_SOFT_RST_SOFT_NON_CFG_RST BIT(2)
diff --git a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h
index 4ad9221..50cf073 100644
--- a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_DEVCPU_GCB_MIIM_REGS_H_
#define _MSCC_OCELOT_DEVCPU_GCB_MIIM_REGS_H_
+#include <linux/bitops.h>
#define MIIM_MII_STATUS(gi) (0x9c + (gi * 36))
#define MIIM_MII_CMD(gi) (0xa4 + (gi * 36))
#define MIIM_MII_DATA(gi) (0xa8 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h
index 04cf70b..fb10bf2 100644
--- a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_OCELOT_ICPU_CFG_H_
#define _MSCC_OCELOT_ICPU_CFG_H_
+#include <linux/bitops.h>
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x4
diff --git a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h
index 9b80fdb..43d40be 100644
--- a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVAL_DEVCPU_GCB_H_
#define _MSCC_SERVAL_DEVCPU_GCB_H_
+#include <linux/bitops.h>
#define CHIP_ID 0x0
#define PERF_GPR 0x4
diff --git a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h
index a3abbc40..e8cb1dc 100644
--- a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVAL_DEVCPU_GCB_MIIM_REGS_H_
#define _MSCC_SERVAL_DEVCPU_GCB_MIIM_REGS_H_
+#include <linux/bitops.h>
#define MIIM_MII_STATUS(gi) (0x5c + (gi * 36))
#define MIIM_MII_CMD(gi) (0x64 + (gi * 36))
#define MIIM_MII_DATA(gi) (0x68 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h
index b8c9d5c..4d4151b 100644
--- a/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVAL_ICPU_CFG_H_
#define _MSCC_SERVAL_ICPU_CFG_H_
+#include <linux/bitops.h>
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x8
diff --git a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h
index 493eaad..7d6c64f 100644
--- a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVALT_DEVCPU_GCB_H_
#define _MSCC_SERVALT_DEVCPU_GCB_H_
+#include <linux/bitops.h>
#define PERF_GPR 0x4
#define PERF_SOFT_RST 0x8
diff --git a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h
index 8c67190..72d7c4d 100644
--- a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVALT_DEVCPU_GCB_MIIM_REGS_H_
#define _MSCC_SERVALT_DEVCPU_GCB_MIIM_REGS_H_
+#include <linux/bitops.h>
#define MIIM_MII_STATUS(gi) (0xc4 + (gi * 36))
#define MIIM_MII_CMD(gi) (0xcc + (gi * 36))
#define MIIM_MII_DATA(gi) (0xd0 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h
index 491ead1..13967f6 100644
--- a/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h
@@ -6,6 +6,7 @@
#ifndef _MSCC_SERVALT_ICPU_CFG_H_
#define _MSCC_SERVALT_ICPU_CFG_H_
+#include <linux/bitops.h>
#define ICPU_GPR(x) (0x4 * (x))
#define ICPU_GPR_RSZ 0x8
diff --git a/arch/mips/mach-mscc/include/mach/tlb.h b/arch/mips/mach-mscc/include/mach/tlb.h
index fdb554f..ebd8ad0 100644
--- a/arch/mips/mach-mscc/include/mach/tlb.h
+++ b/arch/mips/mach-mscc/include/mach/tlb.h
@@ -7,6 +7,7 @@
#define __ASM_MACH_TLB_H
#include <asm/mipsregs.h>
+#include <linux/bitops.h>
#include <mach/common.h>
#include <linux/sizes.h>
diff --git a/arch/mips/mach-mtmips/cpu.c b/arch/mips/mach-mtmips/cpu.c
index 9ee5c7f..2ddf8cb 100644
--- a/arch/mips/mach-mtmips/cpu.c
+++ b/arch/mips/mach-mtmips/cpu.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <init.h>
#include <malloc.h>
+#include <linux/bitops.h>
#include <linux/io.h>
#include <linux/sizes.h>