Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
47e90456ed7a210ca4b23f96621722ca6d8c8c83
/
.
/
arch
/
xtensa
/
cpu
/
Makefile
blob: f28487d20670b50af55dbda2fd69208791abc3be [
file
] [
log
] [
blame
]
# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2007 - 2013 Tensilica, Inc.
# (C) Copyright 2014 - 2016 Cadence Design Systems Inc.
obj
-
y
=
cpu
.
o exceptions
.
o
extra
-
y
=
start
.
o