dts/upstream/Bindings/media/fsl,imx6ull-pxp.yaml

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2
---
$id: http://devicetree.org/schemas/media/fsl,imx6ull-pxp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale Pixel Pipeline

maintainers:
  - Philipp Zabel <p.zabel@pengutronix.de>
  - Michael Tretter <m.tretter@pengutronix.de>

description:
  The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine
  that supports scaling, colorspace conversion, alpha blending, rotation, and
  pixel conversion via lookup table. Different versions are present on various
  i.MX SoCs from i.MX23 to i.MX7.

properties:
  compatible:
    oneOf:
      - enum:
          - fsl,imx6ul-pxp
          - fsl,imx6ull-pxp
          - fsl,imx7d-pxp
      - items:
          - enum:
              - fsl,imx6sll-pxp
              - fsl,imx6sx-pxp
          - const: fsl,imx6ull-pxp

  reg:
    maxItems: 1

  interrupts:
    minItems: 1
    maxItems: 2

  clocks:
    maxItems: 1

  clock-names:
    const: axi

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - fsl,imx6sx-pxp
              - fsl,imx6ul-pxp
    then:
      properties:
        interrupts:
          maxItems: 1
    else:
      properties:
        interrupts:
          minItems: 2
          maxItems: 2

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/imx6ul-clock.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    pxp: pxp@21cc000 {
        compatible = "fsl,imx6ull-pxp";
        reg = <0x021cc000 0x4000>;
        interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
        clock-names = "axi";
        clocks = <&clks IMX6UL_CLK_PXP>;
    };