| /* SPDX-License-Identifier: GPL-2.0+ */ |
| /* |
| * Copyright 2021 Collabora Ltd. |
| */ |
| |
| #ifndef __IMX8MN_BSH_SMM_S2_COMMON_H |
| #define __IMX8MN_BSH_SMM_S2_COMMON_H |
| |
| #include <linux/sizes.h> |
| #include <linux/stringify.h> |
| #include <asm/arch/imx-regs.h> |
| |
| #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) |
| |
| #define CONFIG_SYS_MONITOR_LEN SZ_512K |
| #define CONFIG_SYS_UBOOT_BASE \ |
| (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) |
| |
| #define MEM_LAYOUT_ENV_SETTINGS \ |
| "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ |
| "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ |
| "ramdisk_addr_r=0x43800000\0" \ |
| "fdt_addr_r=0x43000000\0" \ |
| "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ |
| "bootcmd_mfg=echo Running fastboot mode; fastboot usb 0\0" \ |
| |
| /* Link Definitions */ |
| |
| #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 |
| #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K |
| |
| #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
| #define PHYS_SDRAM 0x40000000 |
| |
| #define CONFIG_MXC_UART_BASE UART4_BASE_ADDR |
| |
| /* I2C */ |
| |
| #endif /* __IMX8MN_BSH_SMM_S2_COMMON_H */ |