| // SPDX-License-Identifier: GPL-2.0+ |
| /* |
| * Copyright (c) 2016 Google, Inc |
| */ |
| #include <common.h> |
| #include <dm.h> |
| #include <init.h> |
| #include <log.h> |
| #include <ram.h> |
| #include <timer.h> |
| #include <asm/global_data.h> |
| #include <asm/io.h> |
| #include <asm/arch/timer.h> |
| #include <asm/arch/wdt.h> |
| #include <linux/err.h> |
| #include <dm/uclass.h> |
| |
| /* |
| * Second Watchdog Timer by default is configured |
| * to trigger secondary boot source. |
| */ |
| #define AST_2ND_BOOT_WDT 1 |
| |
| /* |
| * Third Watchdog Timer by default is configured |
| * to toggle Flash address mode switch before reset. |
| */ |
| #define AST_FLASH_ADDR_DETECT_WDT 2 |
| |
| DECLARE_GLOBAL_DATA_PTR; |
| |
| int board_init(void) |
| { |
| gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100; |
| |
| return 0; |
| } |
| |
| int dram_init(void) |
| { |
| struct udevice *dev; |
| struct ram_info ram; |
| int ret; |
| |
| ret = uclass_get_device(UCLASS_RAM, 0, &dev); |
| if (ret) { |
| debug("DRAM FAIL1\r\n"); |
| return ret; |
| } |
| |
| ret = ram_get_info(dev, &ram); |
| if (ret) { |
| debug("DRAM FAIL2\r\n"); |
| return ret; |
| } |
| |
| gd->ram_size = ram.size; |
| |
| return 0; |
| } |