| * Copyright 2009 Freescale Semiconductor, Inc. |
| * SPDX-License-Identifier: GPL-2.0 |
| #include <fsl_ddr_sdram.h> |
| #include <fsl_ddr_dimm_params.h> |
| void fsl_ddr_board_options(memctl_options_t *popts, |
| * Factors to consider for clock adjust: |
| * - number of chips on bus |
| * This needs to be determined on a board-by-board basis. |
| * Factors to consider for CPO: |
| popts->cpo_override = 0xff; |
| * Factors to consider for write data delay: |
| popts->write_data_delay = 2; |
| * Enable half drive strength |
| popts->half_strength_driver_enable = 1; |
| /* Write leveling override */ |
| popts->wrlvl_override = 1; |
| popts->wrlvl_sample = 0xa; |
| popts->wrlvl_start = 0x4; |
| /* Rtt and Rtt_W override */ |
| popts->rtt_override_value = DDR3_RTT_60_OHM; |
| popts->rtt_wr_override_value = 0; /* Rtt_WR= dynamic ODT off */ |