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git01.mediatek.com / filogic / uboot / 2c20b75bff75ac1e1d3ef040e96076cb15fa459b / . / arch / arm / mach-socfpga / include / mach
tree: 32cbd3b2043b2f846c14a99950bc6b586ba6d174 [path history] [tgz]
  1. base_addr_a10.h
  2. base_addr_ac5.h
  3. base_addr_s10.h
  4. boot0.h
  5. clock_manager.h
  6. clock_manager_arria10.h
  7. clock_manager_gen5.h
  8. clock_manager_s10.h
  9. firewall_s10.h
  10. fpga_manager.h
  11. fpga_manager_arria10.h
  12. fpga_manager_gen5.h
  13. freeze_controller.h
  14. gpio.h
  15. handoff_s10.h
  16. mailbox_s10.h
  17. misc.h
  18. nic301.h
  19. pinmux.h
  20. reset_manager.h
  21. reset_manager_arria10.h
  22. reset_manager_gen5.h
  23. reset_manager_s10.h
  24. scan_manager.h
  25. scu.h
  26. sdram.h
  27. sdram_arria10.h
  28. sdram_gen5.h
  29. system_manager.h
  30. system_manager_arria10.h
  31. system_manager_gen5.h
  32. system_manager_s10.h
  33. timer.h