commit 29e1a94d4aea422e6493b26f8603970a2d5d6a7d
author Patrick Delaunay <patrick.delaunay@st.com> Wed Apr 10 14:09:23 2019 +0200
committer Patrice Chotard <patrice.chotard@st.com> Thu May 23 11:38:10 2019 +0200
tree d5dbeed0f9ff972784b7e320414755e7c5d4a6ff
parent 1f987044706682fe4296eb4d47e2b8c0e6a216dd

stm32mp1: ram: change ddr speed to kHz

Allow fractional support in DDR tools.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>

drivers/ram/stm32mp1/stm32mp1_ddr.c

diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c b/drivers/ram/stm32mp1/stm32mp1_ddr.c
index 8200366..1c40a32 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ddr.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c
@@ -373,7 +373,7 @@
 		panic("ddr power init failed\n");
 
 	debug("name = %s\n", config->info.name);
-	debug("speed = %d MHz\n", config->info.speed);
+	debug("speed = %d kHz\n", config->info.speed);
 	debug("size  = 0x%x\n", config->info.size);
 /*
  * 1. Program the DWC_ddr_umctl2 registers
@@ -389,7 +389,7 @@
 
 /* 1.2. start CLOCK */
 	if (stm32mp1_ddr_clk_enable(priv, config->info.speed))
-		panic("invalid DRAM clock : %d MHz\n",
+		panic("invalid DRAM clock : %d kHz\n",
 		      config->info.speed);
 
 /* 1.3. deassert reset */